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參數資料
| 型號： | MC74ACT112D |
| 廠商： | MOTOROLA INC |
| 元件分類： | 通用總線功能 |
| 英文描述： | DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP |
| 中文描述： | ACT SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO16 |
| 封裝： | PLASTIC, SOIC-16 |
| 文件頁數： | 3/6頁 |
| 文件大小： | 191K |
| 代理商： | MC74ACT112D |
MC74AC112 MC74ACT112
5-3
FACT DATA
DC CHARACTERISTICS
Symbol
Parameter
(V)
74AC
74AC
Unit
Conditions
VCC
TA = +25
°
C
TA =
–40
°
C to +85
°
C
Typ
Guaranteed Limits
VIH
Minimum High Level
Input Voltage
3.0
4.5
5.5
1.5
2.25
2.75
2.1
3.15
3.85
2.1
3.15
3.85
VOUT = 0.1 V
or VCC – 0.1 V
V
VIL
Maximum Low Level
Input Voltage
3.0
4.5
5.5
1.5
2.25
2.75
0.9
1.35
1.65
0.9
1.35
1.65
VOUT = 0.1 V
or VCC – 0.1 V
V
VOH
Minimum High Level
Output Voltage
3.0
4.5
5.5
2.99
4.49
5.49
2.9
4.4
5.4
2.9
4.4
5.4
IOUT = –50
μ
A
V
V
*VIN = VIL or VIH
3.0
4.5
5.5
2.56
3.86
4.86
2.46
3.76
4.76
–12 mA
–24 mA
–24 mA
IOH
VOL
Maximum Low Level
Output Voltage
3.0
4.5
5.5
0.002
0.001
0.001
0.1
0.1
0.1
0.1
0.1
0.1
IOUT = 50
μ
A
V
V
*VIN = VIL or VIH
3.0
4.5
5.5
0.36
0.36
0.36
0.44
0.44
0.44
12 mA
24 mA
24 mA
IOL
IIN
Maximum Input
Leakage Current
5.5
±
0.1
±
1.0
μ
A
VI = VCC, GND
IOLD
Minimum Dynamic
Output Current
5.5
75
mA
VOLD = 1.65 V Max
IOHD
5.5
–75
mA
VOHD = 3.85 V Min
ICC
Maximum Quiescent
Supply Current
5.5
4.0
40
μ
A
VIN = VCC or GND
* All outputs loaded; thresholds on input associated with output under test.
Maximum test duration 2.0 ms, one output loaded at a time.
Note: IIN and ICC @ 3.0 V are guaranteed to be less than or equal to the respective limit @ 5.5 V VCC.
AC CHARACTERISTICS
(For Figures and Waveforms — See Section 3)
Symbol
Parameter
(V)
74AC
74AC
Unit
No.
VCC*
TA = +25
°
C
CL = 50 pF
TA = –40
°
C
to +85
°
C
CL = 50 pF
Fig.
Min
Typ
Max
Min
Max
fmax
Maximum Clock
Frequency
3.3
5.0
145
145
125
125
MHz
3-3
tPLH
Propagation Delay
CPn to Qn or Qn
Propagation Delay
CPn to Qn or Qn
Propagation Delay
CDn or SDn to Qn or Qn
Propagation Delay
CDn or SDn to Qn or Qn
3.3
5.0
1.0
1.0
16.0
13.0
1.0
1.0
17.0
13.5
ns
3-6
tPHL
3.3
5.0
1.0
1.0
16.0
13.0
1.0
1.0
16.5
13.5
ns
3-6
tPLH
3.3
5.0
1.0
1.0
11.0
9.5
1.0
1.0
11.5
10.0
ns
3-6
tPHL
3.3
5.0
1.0
1.0
11.0
9.5
1.0
1.0
11.5
10.0
ns
3-6
* Voltage Range 3.3 V is 3.3 V
±
0.3 V.
Voltage Range 5.0 V is 5.0 V
±
0.5 V.
相關PDF資料 |
PDF描述 |
|---|---|
| MC74AC112D | DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP |
| MC74AC112N | DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP |
| MC74ACT112N | DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP |
| MC74ACT113D | DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP |
| MC74AC113D | DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP |
相關代理商/技術參數 |
參數描述 |
|---|---|
| MC74ACT112N | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP |
| MC74ACT113D | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| MC74ACT113N | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP |
| MC74ACT11D | 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:ON Semiconductor 功能描述: |
| MC74ACT11DR2 | 功能描述:邏輯門 5V Triple 3-Input RoHS:否 制造商:Texas Instruments 產品:OR 邏輯系列:LVC 柵極數量:2 線路數量（輸入/輸出）:2 / 1 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 傳播延遲時間:3.8 ns 電源電壓-最大:5.5 V 電源電壓-最小:1.65 V 最大工作溫度:+ 125 C 安裝風格:SMD/SMT 封裝 / 箱體:DCU-8 封裝:Reel |
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