- 您現(xiàn)在的位置：買(mǎi)賣IC網(wǎng) > PDF目錄371057 > MC74ACT112D (MOTOROLA INC) DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP PDF資料下載
參數(shù)資料
| 型號(hào)： | MC74ACT112D |
| 廠商： | MOTOROLA INC |
| 元件分類： | 通用總線功能 |
| 英文描述： | DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP |
| 中文描述： | ACT SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO16 |
| 封裝： | PLASTIC, SOIC-16 |
| 文件頁(yè)數(shù)： | 5/6頁(yè) |
| 文件大?。?/td> | 191K |
| 代理商： | MC74ACT112D |
MC74AC112 MC74ACT112
5-5
FACT DATA
AC CHARACTERISTICS
(For Figures and Waveforms — See Section 3)
Symbol
Parameter
(V)
74ACT
74ACT
Unit
No.
VCC*
TA = +25
°
C
CL = 50 pF
TA = –40
°
C
to +85
°
C
CL = 50 pF
Fig.
Min
Typ
Max
Min
Max
fmax
Maximum Clock
Frequency
5.0
145
125
MHz
3-3
tPLH
Propagation Delay
CPn to Qn or Qn
Propagation Delay
CPn to Qn or Qn
Propagation Delay
CDn or SDn to Qn or Qn
Propagation Delay
CDn or SDn to Qn or Qn
5.0
1.0
14.0
1.0
15.0
ns
3-6
tPHL
5.0
1.0
14.0
1.0
14.5
ns
3-6
tPLH
5.0
1.0
12.0
1.0
12.5
ns
3-6
tPHL
5.0
1.0
12.5
1.0
13.0
ns
3-6
* Voltage Range 5.0 V is 5.0 V
±
0.5 V.
AC OPERATING REQUIREMENTS
Symbol
Parameter
(V)
74ACT
74ACT
Unit
No.
VCC*
TA = +25
°
C
CL = 50 pF
TA = –40
°
C
to +85
°
C
CL = 50 pF
Fig.
Typ
Guaranteed Minimum
ts
Set-up Time, HIGH or LOW
Jn or Kn to CPn
Hold Time, HIGH or LOW
Jn or Kn to CPn
Pulse Width
CPn
Pulse Width
CDn or SDn
Recovery TIme
CDn or SDn to CP
5.0
2.0
2.5
ns
3-9
th
5.0
2.0
2.0
ns
3-9
tw
5.0
5.0
6.0
ns
3-6
tw
5.0
5.5
6.0
ns
3-6
trec
5.0
0
0
ns
3-9
* Voltage Range 5.0 V is 5.0 V
±
0.5 V.
CAPACITANCE
Symbol
Parameter
Value
Typ
Unit
Test Conditions
CIN
Input Capacitance
4.5
pF
VCC = 5.0 V
CPD
Power Dissipation Capacitance
35
pF
VCC = 5.0 V
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MC74AC112D | DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP |
| MC74AC112N | DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP |
| MC74ACT112N | DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP |
| MC74ACT113D | DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP |
| MC74AC113D | DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MC74ACT112N | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP |
| MC74ACT113D | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| MC74ACT113N | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP |
| MC74ACT11D | 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:ON Semiconductor 功能描述: |
| MC74ACT11DR2 | 功能描述:邏輯門(mén) 5V Triple 3-Input RoHS:否 制造商:Texas Instruments 產(chǎn)品:OR 邏輯系列:LVC 柵極數(shù)量:2 線路數(shù)量（輸入/輸出）:2 / 1 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 傳播延遲時(shí)間:3.8 ns 電源電壓-最大:5.5 V 電源電壓-最小:1.65 V 最大工作溫度:+ 125 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DCU-8 封裝:Reel |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。