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參數資料
型號: MC74HC4316N
廠商: ON SEMICONDUCTOR
元件分類: 運動控制電子
英文描述: Dual Timer; Package: DIP; No of Pins: 14; Container: Rail
中文描述: QUAD 1-CHANNEL, SGL POLE SGL THROW SWITCH, PDIP16
封裝: PLASTIC, DIP-16
文件頁數: 2/11頁
文件大小: 319K
代理商: MC74HC4316N
MOTOROLA
High–Speed CMOS Logic Data
DL129 — Rev 6
2
– 0.5 to + 14.0
– 7.0 to + 0.5
VIS
Negative DC Supply Voltage (Ref. to GND)
Analog Input Voltage
VEE – 0.5
V
V
SOIC Package
TSSOP Package
500
450
* Maximum Ratings are those values beyond which damage to the device may occur.
Functional operation should be restricted to the Recommended Operating Conditions.
Derating — Plastic DIP: – 10 mW/ C from 65 to 125 C
SOIC Package: – 7 mW/ C from 65 to 125 C
TSSOP Package: – 6.1 mW/ C from 65 to 125 C
tr, tf
GND
1.2
Digital Input Voltage (Ref. to GND)
V
Static or Dynamic Voltage Across Switch
V
Operating Temperature, All Package Types
Input Rise and Fall Time
– 55
0
0
+ 125
1000
400
C
ns
be drawn; i.e., the current out of the switch may contain both VCC and switch input components.
The reliability of the device will be unaffected unless the Maximum Ratings are exceeded.
VCC = 2.0 V
VCC = 6.0 V
DC ELECTRICAL CHARACTERISTICS
Digital Section
Guaranteed Limit
VCC
– 55 to
2.1
2.1
Control or Enable Inputs
3.0
2.1
Control or Enable Inputs
3.0
6.0
0.9
1.8
0.9
1.8
0.9
1.8
Iin
Maximum Input Leakage
Vin = VCC or GND
6.0
±
0.1
±
1.0
±
1.0
μ
A
Maximum Quiescent Supply
Current (per Package)
VIO = 0 V
6.0
2
40
A
VEE = GND
20
This device contains protection
circuitry to guard against damage
due to high static voltages or electric
fields. However, precautions must
be taken to avoid applications of any
voltage higher than maximum rated
voltages to this high–impedance cir-
cuit. For proper operation, Vin and
Vout should be constrained to the
range GND (Vin or Vout)
Unused inputs must always be
tied to an appropriate logic voltage
level (e.g., either GND or VCC).
Unused outputs must be left open.
I/O pins must be connected to a
properly terminated line or bus.
VCC.
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