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參數(shù)資料
| 型號： | MC74HC4316N |
| 廠商： | ON SEMICONDUCTOR |
| 元件分類： | 運(yùn)動控制電子 |
| 英文描述： | Dual Timer; Package: DIP; No of Pins: 14; Container: Rail |
| 中文描述： | QUAD 1-CHANNEL, SGL POLE SGL THROW SWITCH, PDIP16 |
| 封裝： | PLASTIC, DIP-16 |
| 文件頁數(shù)： | 3/11頁 |
| 文件大小： | 319K |
| 代理商： | MC74HC4316N |
MC74HC4316A
High–Speed CMOS Logic Data
DL129 — Rev 6
3
MOTOROLA
VIS = VCC to VEE
4 5
0.0
160
200
240
VIS = VCC or VEE (Endpoints)
4.5
0.0
90
115
140
Maximum Difference in “ON”
Resistance Between Any Two
VIS = 1/2 (VCC – VEE)
2.0
4.5
6.0
0.0
0.0
– 6.0
—
20
15
—
25
20
—
30
25
Maximum Off–Channel Leakage
6.0
– 6.0
0.1
0.5
1.0
Current, Any One Channel
VIS = VCC or VEE
μ
A
operation, it is recommended that these devices only be used to control digital signals.
NOTE:Information on typical parametric values can be found in Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D).
tPHL
(Figures 8 and 9)
4.5
6
6.0
30
8
50
9
tPZL,
Maximum Propagation Delay, Control or Enable to Analog Output
2.0
140
175
40
250
ns
and Enable Inputs
1. For propagation delays with loads other than 50 pF, see Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D).
2. Information on typical parametric values can be found in Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D).
Control Input = GND
CPD
Power Dissipation Capacitance (Per Switch) (Figure 13)*
* Used to determine the no–load dynamic power consumption: PD = CPD VCC2f + ICC VCC. For load considerations, see Chapter 2 of the
Motorola High–Speed CMOS Data Book (DL129/D).
Typical @ 25
°
C, VCC = 5.0 V
15
pF
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