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參數資料
| 型號： | MC74HC640ADW |
| 廠商： | MOTOROLA INC |
| 元件分類： | 通用總線功能 |
| 英文描述： | Octal 3-State Inverting Bus Transeceiver |
| 中文描述： | HC/UH SERIES, 8-BIT TRANSCEIVER, INVERTED OUTPUT, PDSO20 |
| 封裝： | PLASTIC, SOIC-20 |
| 文件頁數： | 3/7頁 |
| 文件大小： | 151K |
| 代理商： | MC74HC640ADW |
MC54/74HC640A
High–Speed CMOS Logic Data
DL129 — Rev 6
3
MOTOROLA
(Voltages Referenced to GND)
μ
A
±
0.5
±
5.0
25 C
±
0.1
6.0
Output in High–Impedance State
Vin = VIL or VIH
Vout = VCC or GND
Vin = VCC or GND
Maximum Three–State Leakage
Current
IOZ
Unit
μ
A
±
10
125 C
±
1.0
85 C
±
1.0
V
Test Conditions
Vin = VCC or GND
Parameter
Symbol
Iin
NOTE:Information on typical parametric values can be found in Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D).
ICC
Maximum Input Leakage Current
6.0
4.0
40
Maximum Quiescent Supply
6.0
160
μ
A
AC ELECTRICAL CHARACTERISTICS
(CL = 50 pF, Input tr = tf = 6 ns)
Symbol
b l
Parameter
V
15
Guaranteed Limit
U i
125 C
Speed CMOS Data Book (DL129/D).
V
– 55 to
25 C
85 C
Unit
tPLH,
4.5
6.0
Maximum Propagation Delay, A to B, B to A
4.5
2.0
22
22
75
33
95
19
22
110
tPLZ,
Maximum Propagation Delay, Direction or Output Enable to A or B
2.0
12
110
140
28
165
6.0
Maximum Propagation Delay, Output Enable to A or B
(Figures 2 and 4)
4.5
28
33
Maximum Output Transition Time, Any Output
(Figures 1 and 3)
4.5
15
18
(Output in High–Impedance State)
Maximum Three–State I/O Capacitance
CPD
Power Dissipation Capacitance (Per Transceiver Channel)*
* Used to determine the no–load dynamic power consumption: PD = CPD VCC2f + ICC VCC. For load considerations, see Chapter 2 of the
Motorola High–Speed CMOS Data Book (DL129/D).
Typical @ 25
°
C, VCC = 5.0 V
40
pF
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