- 您現在的位置：買賣IC網 > PDF目錄371067 > MC74HC75 (Motorola, Inc.) Dual 2-Bit Transparent Latch PDF資料下載
參數資料
| 型號： | MC74HC75 |
| 廠商： | Motorola, Inc. |
| 英文描述： | Dual 2-Bit Transparent Latch |
| 中文描述： | 雙路2位透明鎖存器 |
| 文件頁數： | 2/5頁 |
| 文件大小： | 172K |
| 代理商： | MC74HC75 |
MOTOROLA
High–Speed CMOS Logic Data
DL129 — Rev 6
2
(Plastic DIP or SOIC Package)
* Maximum Ratings are those values beyond which damage to the device may occur.
Derating — Plastic DIP: – 10 mW/ C from 65 to 125 C
SOIC Package: – 7 mW/ C from 65 to 125 C
260
0
400
VCC = 6.0 V
Symbol
Parameter
Test Conditions
– 55 to
25 C
125 C
6.0
4.2
85 C
4.2
4.2
Unit
Maximum Low–Level Input
Voltage
|Iout|
20
μ
A
2.0
4.5
0.3
0.9
0.3
0.9
0.3
0.9
6.0
5.9
5.9
5.9
V
Vin = VIH or VIL
4.0 mA
4.5
3.98
3.84
3.70
|Iout|
6.0
0.1
0.1
0.1
4.0 mA
5.2 mA
0.26
0.26
0.33
0.33
0.40
0.40
Iin
Maximum Input Leakage Current
Vin = VCC or GND
|Iout|
4.5
6.0
6.0
±
0.1
±
1.0
±
1.0
μ
A
This device contains protection
circuitry to guard against damage
due to high static voltages or electric
fields. However, precautions must
be taken to avoid applications of any
voltage higher than maximum rated
voltages to this high–impedance cir-
cuit. For proper operation, Vin and
Vout should be constrained to the
range GND (Vin or Vout)
Unused inputs must always be
tied to an appropriate logic voltage
level (e.g., either GND or VCC).
Unused outputs must be left open.
VCC.
相關PDF資料 |
PDF描述 |
|---|---|
| MC74HC75D | Dual 2-Bit Transparent Latch |
| MC74HC75N | Dual 2-Bit Transparent Latch |
| MC74HCT00A | Quad 2-Input NAND Gate with LSTTL-Compatible Inputs |
| MC74HCT04T | With LSTTL-Compatible Inputs High-Performance Silicon-Gate CMOS |
| MC74HCT138A | 1-of-8 Decoder/Demultiplexer with LSTTL Compatible Inputs |
相關代理商/技術參數 |
參數描述 |
|---|---|
| MC74HC75D | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| MC74HC75F | 制造商:ON Semiconductor 功能描述: |
| MC74HC75FL2 | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| MC74HC75N | 制造商:Motorola Inc 功能描述: |
| MC74HC85 WAF | 制造商:ON Semiconductor 功能描述: |
發布緊急采購，3分鐘左右您將得到回復。