- 您現在的位置：買賣IC網 > PDF目錄371077 > MC92053 (Motorola, Inc.) Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0 PDF資料下載
參數資料
| 型號： | MC92053 |
| 廠商： | Motorola, Inc. |
| 元件分類： | 通信及網絡 |
| 英文描述： | Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0 |
| 中文描述： | Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0 |
| 文件頁數： | 4/6頁 |
| 文件大?。?/td> | 45K |
| 代理商： | MC92053 |
Motorola
MC92053
4
System Functional Description
Downstream Data Flow
In the downstream direction, the MC92053 receives
ATM cells from an ATM-layer device. Each cell is direct-
ed to one of the four downstream framers as indicated
by the ATM layer. Each framer adds idle cells, as nec-
essary, to produce a continuous cell stream.
The ATM cell stream is randomized and then divided
into blocks of 58 bytes. The Reed-Solomon encoder
adds eight parity bytes to each block. The block is then
sent to the interleaver.
Frame headers are generated internally. The frame
headers include the control of the TDMA for the up-
stream direction. A data link byte may also be included.
Each header is randomized, and then the Reed-So-
lomon encoder adds four parity bytes.
One frame header is combined with twelve payload
blocks from the output of the interleaver to produce an
810-byte frame. Such frames are transmitted continu-
ously through the Tx PMD interface.
Upstream Data Flow
In the upstream direction, the MC92053 receives the
frames recovered by the PMD device. Each frame un-
dergoes error correction by a Reed-Solomon decoder.
The corrected frame is derandomized, and then the
frame header is separated from the ATM cell.
The frame header is processed in accordance with the
definition of the header bytes. The payload is sent to the
cell functions block. Any physical layer cells are discard-
ed, and the remaining cells are transferred to the ATM
layer using a UTOPIA-compliant interface shared by the
four framers.
Other Functions
A microprocessor interface is provided for configuration
control and status monitoring.
A standard IEEE 1149.1 boundary scan test port is pro-
vided.
Applications
The primary application of the MC92053 is to provide
TC-sublayer processing functions for a network device,
e.g., an optical network unit (ONU), in an FTTC net-
work. Figure 3 shows the location of the network device
within an FTTC network. Figure 4 shows a generic ONU
architecture using the MC92053.
The MC92053 uses an external memory for convolu-
tional interleaving of the downstream data. If interleav-
ing is not performed, the external memory is not
required.
Figure 3. Typical FTTC Network
Access
Network
optical fiber
coax / copper pair
ONU
Passive
Splitter
Network
Device
User Device
(Set-Top Box /
Adaptor Card / etc.)
Passive
Splitter
MC92052
User Device
(Set-Top Box /
Adaptor Card / etc.)
MC92052
User Device
(Set-Top Box /
Adaptor Card / etc.)
MC92052
User Device
(Set-Top Box /
Adaptor Card / etc.)
MC92052
MC92053
Network
Device
MC92053
相關PDF資料 |
PDF描述 |
|---|---|
| MC92300 | VITERBI Decoder for Digital TV |
| MC92300CG | VITERBI Decoder for Digital TV |
| MC92305 | 16/32/64/128/256 QAM RECEIVER AND REED-SOLOMON DECODER |
| MC92305CD | 16/32/64/128/256 QAM RECEIVER AND REED-SOLOMON DECODER |
| MC92315 | DVB-T(Digital Video Broadcast - Terrestrial) Demodulator(DVB-T數字視頻通信解調器) |
相關代理商/技術參數 |
參數描述 |
|---|---|
| MC92101CO | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| MC921G | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| MC92300 | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:VITERBI Decoder for Digital TV |
| MC92300CG | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:VITERBI Decoder for Digital TV |
| MC92303 | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:QPSK/BPSK DIGITAL DEMODULATOR |
發布緊急采購，3分鐘左右您將得到回復。