
ILLUSTRATIONS
Figure
Number
11-22
11-23
11-24
11-25
11-26
11-27
12-1
12-2
12-3
12-4
12-5
12-6
12-7
12-8
12-9
12-10
12-11
12-12
12-13
12-14
12-15
12-16
12-17
12-18
Title
Page
Number
xxvi
MCF5272 User’s Manual
MOTOROLA
Hash Table Low (HTLR).........................................................................................11-27
Pointer to Receive Descriptor Ring (ERDSR)..........................................................11-28
Pointer to Transmit Descriptor Ring (ETDSR) ........................................................11-29
Receive Buffer Size (EMRBR).................................................................................11-29
Receive Buffer Descriptor (RxBD) ..........................................................................11-33
Transmit Buffer Descriptor (TxBD)........................................................................11-34
The USB “tiered star” topology..................................................................................12-2
USB Module Block Diagram......................................................................................12-3
USB Frame Number Register (FNR)..........................................................................12-9
USB Frame Number Match Register (FNMR)...........................................................12-9
USB Real-Time Frame Monitor Register (RFMR)..................................................12-10
USB Real-Time Frame Monitor Match Register (RFMMR) ...................................12-11
USB Function Address Register (FAR)....................................................................12-11
USB Alternate Settings Register (ASR)...................................................................12-12
USB Device Request Data 1 Register (DRR1).........................................................12-12
USB Device Request Data 2 Register (DRR2).........................................................12-13
USB Specification Number Register (SPECR)........................................................12-13
USB Endpoint 0 Status Register (EP0SR)................................................................12-14
USB Endpoint 0 IN Configuration Register (IEP0CFG)..........................................12-15
USB Endpoint 0 OUT Configuration Register.........................................................12-15
USB Endpoint 1–7 Configuration Register..............................................................12-16
USB Endpoint 0 Control Register (EP0CTL)...........................................................12-16
USB Endpoint 1-7 Control Register (EPnCTL).......................................................12-19
USB Endpoint 0 Interrupt Mask (EP0IMR) and General/Endpoint 0
Interrupt Registers (EP0ISR)....................................................................................12-21
USB Endpoints 1–7 Interrupt Status Registers (EPnISR)........................................12-23
USB Endpoint 1-7 Interrupt Mask Registers (EPnIMR)..........................................12-24
USB Endpoint 0-7 Data Present Registers (EPnDPR) .............................................12-25
USB Endpoint 0-7 Data Registers (EPnDR) ............................................................12-25
Example USB Configuration Descriptor Structure...................................................12-27
Recommended USB Line Interface..........................................................................12-34
USB Protection Circuit.............................................................................................12-36
PLIC System Diagram................................................................................................13-2
GCI/IDL Receive Data Flow......................................................................................13-3
GCI/IDL B-Channel Receive Data Register Demultiplexing.....................................13-4
GCI/IDL Transmit Data Flow.....................................................................................13-4
GCI/IDL B Data Transmit Register Multiplexing......................................................13-5
B-Channel Unencoded and HDLC Encoded Data......................................................13-6
D-Channel HDLC Encoded and Unencoded Data......................................................13-7
D-Channel Contention................................................................................................13-8
GCI/IDL Loopback Mode...........................................................................................13-9
Periodic Frame Interrupt...........................................................................................13-10
PLIC Internal Timing Signal Routing.......................................................................13-13
12-19
12-20
12-22
12-21
12-23
12-24
12-25
13-1
13-2
13-3
13-4
13-5
13-6
13-7
13-8
13-9
13-10
13-11