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參數資料
| 型號： | MCM69F536CTQ8.5R |
| 廠商： | MOTOROLA INC |
| 元件分類： | SRAM |
| 英文描述： | 32K x 36 Bit Flow-Through BurstRAM Synchronous Fast Static RAM |
| 中文描述： | 32K X 36 CACHE SRAM, 8.5 ns, PQFP100 |
| 封裝： | TQFP-100 |
| 文件頁數： | 6/12頁 |
| 文件大小： | 209K |
| 代理商： | MCM69F536CTQ8.5R |
MCM69F536C
6
MOTOROLA FAST SRAM
ABSOLUTE MAXIMUM RATINGS
(See Note 1)
Rating
Symbol
Value
Unit
Power Supply Voltage
VDD
Vin, Vout
– 0.5 to + 4.6
V
Voltage Relative to VSS for Any
Pin Except VDD
– 0.5 to 6.0
V
Output Current (per I/O)
Iout
PD
Tbias
Tstg
±
20
mA
Package Power Dissipation (See Note 2)
1.6
W
Temperature Under Bias
– 10 to 85
°
C
Storage Temperature
– 55 to 125
°
C
NOTES:
1. Permanent device damage may occur if ABSOLUTE MAXIMUM RATINGS are
exceeded. Functional operation should be restricted to RECOMMENDED OPER–
ATING CONDITIONS. Exposure to higher than recommended voltages for extended
periods of time could affect device reliability.
2. Power dissipation capability is dependent upon package characteristics and use
environment. See Package Thermal Characteristics.
PACKAGE THERMAL CHARACTERISTICS
Rating
Symbol
Max
Unit
Notes
Thermal Resistance Junction to Ambient (@ 200 lfm)
Single–Layer Board
Four–Layer Board
R
θ
JA
40
25
°
C/W
1, 2
Thermal Resistance Junction to Board (Bottom)
R
θ
JB
R
θ
JC
17
°
C/W
1, 3
Thermal Resistance Junction to Case (Top)
9
°
C/W
1, 4
NOTES:
1. Junction temperature is a function of on–chip power dissipation, package thermal resistance, mounting site (board) temperature, ambient
temperature, air flow, board population, and board thermal resistance.
2. Per SEMI G38–87.
3. Indicates the average thermal resistance between the die and the printed circuit board.
4. Indicates the average thermal resistance between the die and the case top surface via the cold plate method (MIL SPEC–883 Method
1012.1).
This device contains circuitry to protect the
inputs against damage due to high static volt-
ages or electric fields; however, it is advised
that normal precautions be taken to avoid
application of any voltage higher than maxi-
mum rated voltages to this high–impedance
circuit.
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