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參數資料
| 型號： | MCP18480T-I/SS |
| 廠商： | Microchip Technology |
| 文件頁數： | 36/64頁 |
| 文件大?。?/td> | 871K |
| 描述： | IC HOT SWAP CTRLR -48V 20SSOP |
| 標準包裝： | 1,600 |
| 類型： | 熱交換控制器 |
| 應用： | IP 電話，LAN 網絡供電，網絡路由器和交換機 |
| 內部開關： | 無 |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 20-SSOP（0.209"，5.30mm 寬） |
| 供應商設備封裝： | 20-SSOP |
| 包裝： | 帶卷 (TR) |
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MCP18480
DS20091B-page 36
?2003 Microchip Technology Inc.
SENSE
13
I
A
Over-current sense.
The voltage on the SENSE input pin is used to detect over-current con-
ditions in the load connected to the external MOSFET. This pin is
directly connected to the source of the MOSFET, with an external
resistor (R
SENSE
) (typically a low resistance) connected between the
source of the MOSFET and V
NEG
.
GATE
14
O
A
MOSFET gate driver.
The GATE output pin attaches to the gate of the external MOSFET.
The voltage on the GATE pin is pulled to the voltage on the V
NEG
pin
whenever the voltage on the UV
TH
pin is less than the voltage on the
V
REFIN
pin, or the voltage on the OV
TH
pin is greater than the voltage
on the V
REFIN
pin.
The GATE pin is also pulled to the voltage on the V
NEG
pin when the
ENABLE input pin is low.
When current limit is reached, the voltage on the GATE pin is adjusted
to maintain a constant voltage across the R
SENSE
resistor while the
C
TIMER
capacitor starts to charge. When the voltage on C
TIMER
exceeds V
REFIN
/2, the GATE pin is pulled to V
NEG
to turn off the exter-
nal MOSFET. A RC network can be added from the GATE pin to the
drain of the external MOSFET, along with a capacitor from the GATE
pin to the V
NEG
pin, to control the slew rate of the GATE pin.
The GATE pin pull-up current is proportioned to the I
ISET
current.
V
FB
15
I
A
External MOSFET drain monitor.
The V
FB
input pin monitors the voltage at the drain of the external
power MOSFET switch with respect to the voltage on the V
NEG
pin for
use by the internal foldback circuitry. An external resistor divider net-
work (R
FB1
and R
FB2
) is attached between the drain of this external
MOSFET and the V
NEG
pin (R
FB1
is connected between the drain of
the external MOSFET and the V
FB
pin, while R
FB2
is connected
between the V
FB
pin and the V
NEG
pin). This prevents high-voltage
breakdown of the V
FB
input.
DRAIN
TH
16
I
A
MOSFET drain comparator threshold.
This pin is used during the power-up sequence of the inserted board,
and after any fault condition that turns off the GATE pin drive. The
voltage on the pin indicates when the external FET is fully enhanced
by comparing the pin voltage to an internal reference voltage
(approximately 100 mV derived from the internal band gap reference).
An external resistor divider network (R
DRAIN1
and R
DRAIN2
) is attached
between the drain of this external MOSFET and the V
NEG
pin (R
DRAIN1
is connected between the drain of the external MOSFET and the
DRAIN
TH
pin while R
DRAIN2
is connected between the DRAIN
TH
pin
and the V
NEG
pin).
TABLE 3-1:
MCP18480 PIN DESCRIPTIONS (CONTINUED)
Pin Name
Pin
Number
Pin
Direction
Buffer
Type
Description
SSOP
Legend: TTL = TTL compatible input
ST = Schmitt Trigger input with CMOS levels
I = Input
O = Output
P = Power
CMOS = CMOS-compatible input
A = Analog
D = Digital
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