
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper ESD Handling Procedures.
Copyright
Harris Corporation 1999
2-13
Semiconductor
PROCESS OBSOLETE - NO NEW DESIGNS
MCTV65P100F1,
MCTA65P100F1
65A, 1000V
Package
JEDEC STYLE TO-247
JEDEC MO-093AA (5-LEAD TO-218)
Symbol
GATE
GATE RETURN
ANODE
ACATHODE
CATHODE (FLANGE)
CATHODE (FLANGE)
GATE
GATE RETURN
ANODE
ACATHODE
G
A
K
Features
65A, -1000V
V
TM
≤
-1.4V at I = 65A and +150
o
C
2000A Surge Current Capability
2000A/
μ
s di/dt Capability
MOS Insulated Gate Control
100A Gate Turn-Off Capability at +150
o
C
Description
The MCT is an MOS Controlled Thyristor designed for switching
currents on and off by negative and positive voltage control of an
insulated MOS gate. It is designed for use in motor controls,
inverters, line switches and other power switching applications.
The MCT is especially suited for resonant (zero voltage or zero
current switching) applications. The SCR like forward drop
greatly reduces conduction power loss.
MCTs allow the control of high power circuits with very small
amounts of input energy. They feature the high peak current
capability common to SCR type thyristors, and operate at junc-
tion temperatures up to +150
o
C with active switching.
Formerly TA9900.
PART NUMBER INFORMATION
PART NUMBER
PACKAGE
BRAND
MCTV65P100F1
TO-247
M65P100F1
MCTA65P100F1
MO-093AA
M65P100F1
NOTE: When ordering, use the entire part number.
April 1999
Absolute Maximum Ratings
T
C
= +25
o
C, Unless Otherwise Specified
MCTV65P100F1
MCTA65P100F1
-1000
+5
UNITS
V
V
Peak Off-State Voltage (See Figure 11). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
DRM
Peak Reverse Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
RRM
Continuous Cathode Current (See Figure 2)
T
C
= +25
o
C (Package Limited) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
T
C
= +90
o
C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Non-Repetitive Peak Cathode Current (Note 1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I
TSM
Peak Controllable Current (See Figure 10) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I
TC
Gate-Anode Voltage (Continuous) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
GA
Gate-Anode Voltage (Peak) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
GA
Rate of Change of Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . dv/dt
Rate of Change of Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . di/dt
Maximum Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . P
T
Linear Derating Factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T
J
, T
STG
Maximum Lead Temperature for Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
(0.063" (1.6mm) from case for 10s)
NOTE:
1. Maximum Pulse Width of 200
μ
s (Half Sine) Assume T
J
(Initial) = +90
o
C and T
J
(Final) = T
J
(Max) = +150
o
C
I
K25
I
K90
85
65
A
A
A
A
V
V
2000
100
±
20
±
25
See Figure 11
2000
208
1.67
-55 to +150
260
A/
μ
s
W
W/
o
C
o
C
o
C
T
L
File Number
3516.5
PART WITHDRAWN