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參數資料
| 型號： | MF5CWM |
| 廠商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分類： | 運動控制電子 |
| 英文描述： | MF5 Universal Monolithic Switched Capacitor Filter |
| 中文描述： | SWITCHED CAPACITOR FILTER, RESISTOR PROGRAMMABLE, UNIVERSAL, PDSO14 |
| 封裝： | SO-14 |
| 文件頁數： | 3/16頁 |
| 文件大小： | 293K |
| 代理商： | MF5CWM |
Filter Electrical Characteristics
V
a
e
5V
g
0.5%, V
b
e b
5V
g
0.5% unless otherwise noted.
Boldface
limits apply over temperature, T
MIN
s
T
A
s
T
MAX
.
For all other limits T
A
e
25
§
C. (Continued)
Typical
(Note 6)
Tested
Limit
(Note 7)
Design
Limit
(Note 8)
Parameter
Conditions
Units
Output
Swing (Min)
BP, LP pins
RL
e
5 k
X
RL
e
3.5 k
X
V
pin9
e a
5V
(50:1 CLK ratio)
V
pin9
e b
5V
(100:1 CLK ratio)
g
4.0
g
3.8
V
N/AP/HP pin
g
4.2
83
g
3.8
V
dB
Dynamic Range
(Note 4)
80
dB
Maximum Output Short Circuit
Current (Note 5)
Source
20
mA
Sink
3.0
mA
OP-AMP Electrical Characteristics
V
a
e a
5V
g
0.5%, V
b
e b
5V
g
0.5% unless other noted.
Bold-
face limits apply over temperature, T
MIN
s
T
A
s
T
MAX
.
For all other limits T
A
e
25
§
C.
Typical
(Note 6)
Tested
Limit
(Note 7)
Design
Limit
(Note 8)
Parameter
Conditions
Units
Gain Bandwidth Product
2.5
MHz
Output Voltage Swing (Min)
RL
e
3.5 k
X
g
4.2
7.0
g
3.8
V
Slew Rate
V/
m
s
DC Open-Loop Gain
80
db
Input Offset Voltage (Max)
g
5.0
10
g
20
mV
Input Bias Current
pA
Maximum Output
Short Circuit
Current (Note 5)
Source
20
mA
Sink
3.0
mA
Logic Input Characteristics
Boldface limits apply over temperature, T
MIN
s
T
A
s
T
MAX
.
All other limits T
A
e
25
§
C.
Typical
(Note 6)
Tested
Limit
(Note 7)
Design
Limit
(Note 8)
Parameter
Conditions
Units
CMOS Clock
Input
Min Logical ‘‘1’’
Input Voltage
3.0
V
V
a
e a
5V, V
b
e b
5V,
V
L.Sh.
e
0V
Max Logical ‘‘0’’
Input Voltage
b
3.0
V
Min Logical ‘‘1’’
Input Voltage
8.0
V
V
a
e a
10V, V
b
e
0V,
V
L.Sh.
e a
5V
Max Logical ‘‘0’’
Input Voltage
2.0
V
TTL Clock
Input
Min Logical ‘‘1’’
Input Voltage
2.0
V
V
a
e a
5V, V
b
e b
5V,
V
L.Sh.
e
0V
Max Logical ‘‘0’’
Input Voltage
0.8
V
Note 1:
The typical junction-to-ambient thermal resistance (
i
JA
) of the 14 pin N package is 160
§
C/W, and 82
§
C/W for the M package.
Note 2:
The accuracy of the Q value is a function of the center frequency (f
o
). This is illustrated in the curves under the heading ‘‘Typical Performance
Characteristics’’.
Note 3:
V
os1
, V
os2
, and V
os3
refer to the internal offsets as discussed in the Application Information section 3.4.
Note 4:
For
g
5V supplies the dynamic range is referenced to 2.82V rms (4V peak) where the wideband noise over a 20 kHz bandwidth is typically 200
m
V rms for
the MF5 with a 50:1 CLK ratio and 280
m
V rms for the MF5 with a 100:1 CLK ratio.
Note 5:
The short circuit source current is measured by forcing the output that is being tested to its maximum positive voltage swing and then shorting that output to
the negative supply. The short circuit sink current is measured by forcing the output that is being tested to its maximum negative voltage swing and then shorting
that output to the positive supply. These are the worst case conditions.
Note 6:
Typicals are at 25
§
C and represent most likely parametric norm.
Note 7:
Guaranteed and 100% tested.
Note 8:
Guaranteed, but not 100% tested. These limits are not used to calculate outgoing quality levels.
3
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