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參數資料
| 型號： | MM54C85J |
| 廠商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分類： | 通用總線功能 |
| 英文描述： | 4-Bit Magnitude Comparator |
| 中文描述： | CMOS SERIES, 4-BIT MAGNITUDE COMPARATOR, TRUE OUTPUT, CDIP14 |
| 封裝： | CERAMIC, DIP-14 |
| 文件頁數： | 2/4頁 |
| 文件大小： | 116K |
| 代理商： | MM54C85J |
Absolute Maximum Ratings
(Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Voltage at Any Pin
b
0.3V to V
CC
a
0.3V
Operating Temperature Range
MM54C85
MM74C85
b
55
§
C to
a
125
§
C
b
40
§
C to
a
85
§
C
b
65
§
C to
a
150
§
C
Storage Temperature Range
Power Dissipation (P
D
)
Dual-In-Line
Small Outline
700 mW
500 mW
Operating V
CC
Range
V
CC
Lead Temperature
(Soldering, 10 seconds)
3.0V to 15V
18V
260
§
C
DC Electrical Characteristics
Min/Max limits apply across temperature range unless otherwise noted
Symbol
Parameter
Conditions
Min
Typ
Max
Units
CMOS TO CMOS
V
IN(1)
Logical ‘‘1’’ Input Voltage
V
CC
e
5.0V
V
CC
e
10V
V
CC
e
5.0V
V
CC
e
10V
V
CC
e
5.0V, I
O
e b
10
m
A
V
CC
e
10V, I
O
e b
10
m
A
V
CC
e
5.0V, I
O
e a
10
m
A
V
CC
e
10V, I
O
e a
10
m
A
V
CC
e
15V, V
IN
e
15V
V
CC
e
15V, V
IN
e
0V
V
CC
e
15V
3.5
8.0
V
V
V
IN(0)
Logical ‘‘0’’ Input Voltage
1.5
2.0
V
V
V
OUT(1)
Logical ‘‘1’’ Output Voltage
4.5
9.0
V
V
V
OUT(0)
Logical ‘‘0’’ Output Voltage
0.5
1.0
V
V
I
IN(1)
Logical ‘‘1’’ Input Current
0.005
1.0
m
A
I
IN(0)
Logical ‘‘0’’ Input Current
b
1.0
b
0.005
m
A
I
CC
Supply Current
0.05
300
m
A
CMOS/LPTTL INTERFACE
V
IN(1)
Logical ‘‘1’’ Input Voltage
54C, V
CC
e
4.5V
74C, V
CC
e
4.75V
54C, V
CC
e
4.5V
74C, V
CC
e
4.75V
54C, V
CC
e
4.5V, I
O
e b
360
m
A
74C, V
CC
e
4.75V, I
O
e b
360
m
A
54C, V
CC
e
4.5V, I
O
e
360
m
A
74C, V
CC
e
4.75V, I
O
e
360
m
A
V
CC
b
1.5
V
CC
b
1.5
V
V
V
IN(0)
Logical ‘‘0’’ Input Voltage
0.8
0.8
V
V
V
OUT(1)
Logical ‘‘1’’ Output Voltage
2.4
2.4
V
V
V
OUT(0)
Logical ‘‘0’’ Output Voltage
0.4
0.4
V
V
OUTPUT DRIVE (See 54C/74C Family Characteristics Data Sheet) (Short Circuit Current)
I
SOURCE
Output Source Current
(P-Channel)
V
CC
e
5.0V, V
OUT
e
0V
T
A
e
25
§
C
V
CC
e
10V, V
OUT
e
0V
T
A
e
25
§
C
V
CC
e
5.0V, V
OUT
e
V
CC
T
A
e
25
§
C
V
CC
e
10V, V
OUT
e
V
CC
T
A
e
25
§
C
b
1.75
b
3.3
mA
I
SOURCE
Output Source Current
(P-Channel)
b
8.0
b
15
mA
I
SINK
Output Sink Current
(N-Channel)
1.75
3.6
mA
I
SINK
Output Sink Current
(N-Channel)
8.0
16
mA
AC Electrical Characteristics
*
T
A
e
25
§
C, C
L
e
50 pF, unless otherwise specified
Symbol
Parameter
Conditions
V
CC
e
50V
V
CC
e
10V
Min
Typ
Max
Units
t
pd
Propagation Delay from any A
or B Data Input to any
Data Output
250
100
600
300
ns
ns
t
pd
Propagation Delay Time from
any Cascade Input to
any Output
V
CC
e
50V
V
CC
e
10V
200
100
500
250
ns
ns
C
IN
C
PD
*
AC Parameters are guaranteed by DC correlated testing.
Input Capacitance
Any Inupt
5.0
pF
Power Dissipation Capacitance
(Note 3) Per Package
45
pF
Note 1:
‘‘Absolute Maximum Ratings’’ are those values beyond which the safety of the device cannot be guaranteed. Except for ‘‘Operating Temperature Range’’
they are not meant to imply that the devices should be operated at these limits. The table of ‘‘Electrical Characteristics’’ provides conditions for actual device
operation.
Note 2:
Capacitance is guaranteed by periodic testing.
Note 3:
C
PD
determines the no load AC power consumption of any CMOS device. For complete explanation see 54C/74C Family Characteristics application note,
AN-90.
2
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