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參數資料
型號: MN101C77C
廠商: PANASONIC CORP
元件分類: 微控制器/微處理器
英文描述: MN101C77A
中文描述: 8-BIT, MROM, 20 MHz, MICROCONTROLLER, PQFP64
封裝: 14 X 14 MM, LEAD FREE, PLASTIC, LQFP-64
文件頁數: 1/4頁
文件大小: 306K
代理商: MN101C77C
MAD00038JEM
MN101C77A, MN101C77C, MN101C77D,
MN101C77F
Type
Internal ROM type
ROM (byte)
RAM (byte)
MN
101
C
77
A
MN
101
C
77
C
MN
101
C
77
D
MN
101
C
77
F
MN
101
CF
77
G
FLASH
128
K
Mask ROM
32
K
1
.
5
K
48
K
3
K
64
K
96
K
6
K
Package (Lead-free)
LQFP
064
-P-
1414
LQFP
064
-P-
1414
,
TQFP
064
-P-
1010
C
LQFP
064
-P-
1414
LQFP
064
-P-
1414
(Under development)
LQFP
064
-P-
1414
,
TQFP
064
-P-
1010
C
Minimum Instruction
Execution Time
[Standard]
0
.
1
μ s (at
2
.
5
V to
3
.
6
V,
20
MHz) *
0
.
2
μ s (at
2
.
1
V to
3
.
6
V,
10
MHz) *
0
.
5
μ s (at
1
.
8
V to
3
.
6
V,
4
MHz) *
62
.
5
μ s (at
1
.
8
V to
3
.
6
V,
32
kHz) *
[Double speed]
0
.
119
μ s (at
2
.
5
V to
3
.
6
V,
8
.
39
MHz) *
* The operation guarantee range for flash memory built-in type is
2
.
7
V to
3
.
6
V.
Interrupts
RESET, Watchdog, External
0
to
4
, Timer
0
, Timer
1
, Timer
4
to
6
, Timer
7
(
2
systems), Time base, Serial
0
reception, Serial
0
transmission, Serial
1
reception, Serial
1
transmission, Serial
3
, Serial
4
, Automatic transfer finish, A/D conversion finish, Key
interrupts (
8
lines)
Timer Counter
Timer counter
0
:
8
-bit
×
1
(square-wave/
8
-bit PWM output, event count, generation of remote control carrier, pulse width measurement)
Clock source ...............
1
/
2
,
1
/
4
of system clock frequency;
1
/
1
,
1
/
4
,
1
/
16
,
1
/
32
,
1
/
64
of OSC oscillation clock frequency;
1
/
1
of
XI oscillation clock frequency; external clock input
nterrupt source ........... coincidence with compare register
0
Timer counter
1
:
8
-bit
×
1
(square-wave output, event count, synchronous output event)
Clock source ...............
1
/
2
,
1
/
8
of system clock frequency;
1
/
1
,
1
/
4
,
1
/
16
,
1
/
64
,
1
/
128
of OSC oscillation clock frequency;
1
/
1
of
XI oscillation clock frequency; external clock input
nterrupt source ........... coincidence with compare register
1
Timer counter
0
,
1
can be cascade-connected.
Timer counter
4
:
8
-bit
×
1
(square-wave/
8
-bit PWM output, event count, pulse width measurement, serial
1
baud rate timer)
Clock source ...............
1
/
2
,
1
/
4
of system clock frequency;
1
/
1
,
1
/
4
,
1
/
16
,
1
/
32
,
1
/
64
of OSC oscillation clock frequency;
1
/
1
of
XI oscillation clock frequency;
1
/
1
of external clock input frequency
nterrupt source ........... coincidence with compare register
4
Timer counter
5
:
8
-bit
×
1
(square-wave/
8
-bit PWM output, event count, pulse width measurement, serial
0
baud rate timer)
Clock source ...............
1
/
2
,
1
/
4
of system clock frequency;
1
/
1
,
1
/
4
,
1
/
16
,
1
/
32
,
1
/
64
of OSC oscillation clock frequency;
1
/
1
of
XI oscillation clock frequency;
1
/
1
of external clock input frequency
nterrupt source ........... coincidence with compare register
5
Timer counter
6
:
8
-bit freerun timer
Clock source ...............
1
/
1
of system clock frequency;
1
/
1
,
1
/
4096
,
1
/
8192
of OSC oscillation clock frequency;
1
/
1
,
1
/
4096
,
1
/
8192
of XI oscillation clock frequency
nterrupt source ........... coincidence with compare register
6
Timer counter
7
:
16
-bit
×
1
(square-wave/
16
-bit PWM output, cycle / duty continuous variable, event count, synchronous output evevt, pulse width
measurement, input capture)
Clock source ...............
1
/
1
,
1
/
2
,
1
/
4
,
1
/
16
of system clock frequency;
1
/
1
,
1
/
2
,
1
/
4
,
1
/
16
of OSC oscillation clock frequency;
1
/
1
,
1
/
2
,
1
/
4
,
1
/
16
of external clock input frequency
nterrupt source ........... coincidence with compare register
7
(
2
lines)
相關PDF資料
PDF描述
MN101C77D MN101C77A
MN101C77F MN101C77A
MN101CF78A MN101C78A
MN101C78A MN101C78A
MN101CF84D MN101C84A
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參數描述
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