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參數資料
| 型號： | MN673274 |
| 廠商： | PANASONIC CORP |
| 元件分類： | 消費家電 |
| 英文描述： | Signal-Processing IC for Multipurpose Cameras |
| 中文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP128 |
| 封裝： | 18 X 18 MM, PLASTIC, LQFP-128 |
| 文件頁數： | 5/14頁 |
| 文件大小： | 92K |
| 代理商： | MN673274 |
Video Camera LSI
MN673274
5
I
Pin Descriptions (continued)
Pin No.
Pin Name
I/O
Description
36
YUVOE
I
Digital output system output enable
37
VCSYNCVD
O
VCSYNC output/VD output (VGA mode: CSYNC, IT mode: register switching)
38
HREFCBLK
O
HREF output/CBLK output (VGA mode: HREF, IT mode: register switching)
39
SCANT
I
Test input (Normally connect low)
40
MINTEST
I
Test input (Normally connect low)
41
FVR
I
DC level input used for frequency control
42
LPFI
I
Low-pass filter analog switch input
43
VCXO
O
Analog switch output - LC oscillator
44
DAVDD2
VDD
D/A converter power supply
45
DAVSS2
VSS
D/A converter ground
46
GSIG
O
Video output (composite/G signal) Connect the resistor R
L
between GSIG and DAVSS2
Phase compensation Connect a 1
μ
F capacitor between COMP1 and DAVDD2
47
COMP1
I
48
IREF1
I
Bias current resistor connection Connect the resistor R
IREF
between IREGF1 and DAVSS2
49
VREF1
I
Reference voltage input
50
RSIG
O
Video output (luminance/R signal) Connect the resistor R
L
between RSIG and DAVSS1
51
DAVDD1
VDD
D/A converter power supply
52
DAVSS1
VSS
D/A converter ground
53
BSIG
O
Video output (chrominance/B signal) Connect the resistor R
L
between BSIG and DAVSS1
Phase compensation Connect a 1
μ
F capacitor between this pin and DAVDD1
54
COMP23
I
55
IREF23
I
Bias current resistor connection Connect the resistor R
IREF
between this pin and DAVSS1
56
VREF23
I
Reference voltage input
57
VREFH
I
High-level reference voltage input
58
VREFHM
I
Intermediate reference potential Connect a capacitor between this pin and ADVSS
59
VREFM
I
Intermediate reference potential Connect a capacitor between this pin and ADVSS
60
ADVSS
VSS
A/D converter power supply
61
ADVDD
VDD
A/D converter ground
62
VREFML
I
Intermediate reference potential Connect a capacitor between this pin and ADVSS
63
VREFL
I
Low-level reference voltage input
64
VIN
I
Analog signal input
65
TEST4
I
Test input (Normally connect low)
66
TEST3
I
Test input (Normally connect low)
67
TEST2
I
Test input (Normally connect low)
68
TEST1
I
Test input (Normally connect low)
69
TEST0
I
Test input (Normally connect low)
70
CCDSEL0
I
CCD switching
71
CCDSEL1
I
CCD switching
72
CCDSEL2
I
CCD switching
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