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參數資料
| 型號： | MT48H16M16LFBF-10IT |
| 元件分類： | DRAM |
| 英文描述： | 16M X 16 SYNCHRONOUS DRAM, 7 ns, PBGA54 |
| 封裝： | 8 X 9 MM, PLASTIC, VFBGA-54 |
| 文件頁數： | 1/20頁 |
| 文件大小： | 314K |
| 代理商： | MT48H16M16LFBF-10IT |
This data sheet contains the present description of a product in definition with no formal design in progress. Products and
specifications discussed herein are subject to change by Micron without notice.
256Mb: 16 Meg x 16, 8 Meg x 32 Mobile SDRAM
Features
Preview
09005aef8175ed0d/09005aef8175ed22
Micron Technology, Inc., reserves the right to change products or specifications without notice.
256Mb Mobile SDR SDRAM_1.fm - Ver. A 11/05 EN
1
2004 Micron Technology, Inc. All rights reserved.
Mobile SDRAM
MT48H16M16LF – 4 Meg x 16 x 4 banks
MT48H8M32LF – 2 Meg x 32 x 4 banks
For the latest data sheet, refer to Micron’s Web site: http://www.micron.com/products/dram/mobile
Features
Fully synchronous; all signals registered on positive
edge of system clock
VDD = +1.8V ±0.1V, VDDQ = +1.8V ±0.1V
Internal, pipelined operation; column address can
be changed every clock cycle
Four internal banks for concurrent operation
Programmable burst lengths: 1, 2, 4, 8, or full page
Auto precharge, includes concurrent auto precharge
Auto refresh and self refresh modes
LVTTL-compatible inputs and outputs
On-chip temperature sensor to control refresh rate
Partial array self refresh (PASR)
Deep power-down (DPD)
Selectable output drive (DS)
64ms refresh period (8,192 rows)
Notes: 1. Only available for x16 configuration.
2. Only available for x32 configuration.
Options
Marking
VDD/VDDQ
1.8V/1.8V
H
Configuration
16 Meg x 16 (4 Meg x 16 x 4 banks)
16M16
8 Meg x 32 (2 Meg x 32 x 4 banks)
8M32
Plastic Package
54-Ball VFBGA (8mm x 9mm)1
BF
90-Ball VFBGA (8mm x 13mm)2
B5
Timing – Cycle Time
7.5ns @ CL = 3
-75
8ns @ CL = 3
-8
10ns @ CL = 3
-10
Operating Temperature Range
Commercial (0° to +70°C)
None
Industrial (-40°C to +85°C)
IT
Table 1:
Addressing
Table 2:
Key Timing Parameters
16 Meg x 16
8 Meg x 32
Configuration
4 Meg x 16 x 4
banks
2 Meg x 32 x 4
banks
Refresh Count
8K
Row Addressing
8K (A0-A12)
Bank
Addressing
4 (BA0, BA1)
Column
Addressing
512K (A0-A8)
256 (A0-A7)
Speed
Grade
Clock Rate
Access
Time
at CL3
Data
Setup
Time
Data
Hold
Time
CL = 1 CL = 2 CL = 3
-75
-
111
133
MHz
6ns
1.5ns
1ns
-8
50
111
125
MHz
7ns
2.5ns
1ns
-10
40
83
104
MHz
7ns
2.5ns
1ns
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相關代理商/技術參數 |
參數描述 |
|---|---|
| MT48H16M16LFBF-75 | 制造商:Micron Technology Inc 功能描述:MICMT48H16M16LFBF-75 IT:G 256MB MOBILE S |
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