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| 型號(hào)： | MT49H16M18C |
| 廠商： | Micron Technology, Inc. |
| 英文描述： | 288Mb SIO REDUCED LATENCY(RLDRAM II) |
| 中文描述： | 288Mb二氧化硅約化延遲（延遲DRAM二） |
| 文件頁(yè)數(shù)： | 1/44頁(yè) |
| 文件大小： | 1117K |
| 代理商： | MT49H16M18C |
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PRODUCTS AND SPECIFICATIONS DISCUSSED HEREIN ARE SUBJECT TO CHANGE BY MICRON WITHOUT NOTICE.
pdf: 09005aef80a41b59/zip: 09005aef811ba111
MT49H8M18C_1.fm - Rev. F 11/04 EN
1
2004 Micron Technology, Inc. All rights reserved.
16 MEG x 18, 32 MEG x 9
2.5V V
EXT
, 1.8V V
DD
, HSTL, SIO, RLDRAM II
288Mb SIO REDUCED
LATENCY (RLDRAM II)
MT49H16M18C
MT49H32M9C
Features
288Mb
400 MHz DDR operation (800 Mb/s/pin data rate)
Organization
16 Meg x 18, 32 Meg x 9 Separate I/O
8 banks
Cyclic bank switching for maximum bandwidth
Reduced cycle time (20ns at 400 MHz)
Nonmultiplexed addresses (address multiplexing
option available)
SRAM-type interface
Read latency (RL), row cycle time, and burst
sequence length
Balanced READ and WRITE latencies in order to
optimize data bus utilization
Data mask for WRITE commands
Differential input clocks (CK, CK#)
Differential input data clocks (DKx, DKx#)
On-chip DLL generates CK edge-aligned data and
output data clock signals
Data valid signal (QVLD)
32ms refresh (8K refresh for each bank; 64k refresh
command must be issued in total each 32ms)
144-ball FBGA package
HSTL I/O (1.5V or 1.8V nominal)
25
–60
matched impedance outputs
2.5V V
EXT
, 1.8V V
DD
, 1.5V or 1.8V V
DD
Q I/O
On-die termination (ODT) R
TT
NOTE:
1. Contact Micron for availability of lead-free
products.
Options
Clock Cycle Timing
2.5ns (400 MHz)
3.3ns (300 MHz)
5ns (200 MHz)
Configuration
16 Meg x 18
32 Meg x 9
Package
144-ball FBGA
(11mm x 18.5mm)
Marking
-25
-33
-5
MT49H16M18CFM
MT49H32M9CFM
FM
BM (lead-free)
1
Table 1:
Valid Part Numbers
PART NUMBER
DESCRIPTION
MT49H16M18CFM-xx
MT49H32M9CFM-xx
16 Meg x 18 RLDRAM II
32 Meg x 9 RLDRAM II
Figure 1: 144-Ball FBGA
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MT49H16M18CFM-xx | 288Mb SIO REDUCED LATENCY(RLDRAM II) |
| MT49H32M9C | 288Mb SIO REDUCED LATENCY(RLDRAM II) |
| MT49H32M9CFM-xx | 288Mb SIO REDUCED LATENCY(RLDRAM II) |
| MT4C1004J | 4 Meg x 1 FPM DRAM(4 M x 1快速頁(yè)面模式動(dòng)態(tài)RAM) |
| MT4C4001STG-6 | standard or self refresh |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MT49H16M18CBM-25 | 制造商:Micron Technology Inc 功能描述: |
| MT49H16M18CBM-25 TR | 制造商:Micron Technology Inc 功能描述:16MX18 RLDRAM PLASTIC PBF FBGA 1.8V SEPARATE I/O 8 BANKS - Tape and Reel |
| MT49H16M18CBM-33 IT | 制造商:Micron Technology Inc 功能描述: |
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