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參數資料
| 型號： | MT8LLN22NCNE |
| 元件分類： | 總線控制器 |
| 英文描述： | PCI BUS CONTROLLER, PBGA316 |
| 封裝： | 27 X 27 MM, PLASTIC, BGA-316 |
| 文件頁數： | 1/145頁 |
| 文件大小： | 2285K |
| 代理商： | MT8LLN22NCNE |
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Coppertail Product Specification
MT8LLN22NCNE.fm – Rev. 1, Pub. 2/02
1
2002, Micron Technology Inc.
PRODUCTS AND SPECIFICATIONS DISCUSSED HEREIN ARE FOR EVALUATION AND REFERENCE PURPOSES ONLY AND ARE SUBJECT TO CHANGE BY
MICRON WITHOUT NOTICE. PRODUCTS ARE ONLY WARRANTED BY MICRON TO MEET MICRON’S PRODUCTION DATA SHEET SPECIFICATIONS.
PRELIMINARY
MT8LLN22NCNE
COPPERTAIL
GENERAL DESCRIPTION
The Micron 21PAD/22NCN chipset consists of two
components: the 21PAD host controller and the
22NCN peripheral bus controller. 21PAD and 22NCN
combine to form a high-performance chipset that sup-
ports Intel Pentium III (80533/80530 family) proces-
sors. They are designed to ensure maximum through
put with maximum concurrency.
The 21PAD host controller consists of an interface
to dual Pentium III with 512KB cache (80533/80530
family) processors; a DDR SDRAM controller; a 64-bit,
33 MHz PCI bus controller; and a 66/100/133 MHz
PCI-X controller. The host interface operates at 100 or
133 MHz, and the DDR SDRAM interface operating at
the same frequency as the host interface. All of the
21PAD’s interfaces are designed for high reliability and,
as such, support error detection and correction where
applicable.
The 21PAD architecture is based on a crossbar
switch that allows simultaneous 128-bit paths between
128-bit wide internal buffers. The internal array is
clocked at 100 or 133 MHz, enabling a peak bandwidth
of 1.6 or 2.1GB/pp. The switch’s controller performs
arbitration and sets up separate request—read data
and write data—paths. If three paths are enabled
simultaneously, the aggregate bandwidth is 6.3GB/s.
The 21PAD’s south bridge companion chip, the
22NCN, contains an ATA100 IDE controller, USB root
hub supporting four ports, SMbus controller, I/O APIC
supporting 40 interrupts with 20 available externally,
and LPC controller. For compliance with current
power management standards, 22NCN incorporates
support for ACPI and APM. The 22NCN also contains
legacy devices such as an Interrupt controller, DMA
controller, real time clock, and system timers.
The Micron 21PAD chipset’s multiple fast-wide PCI
busses enable server designs to handle large amounts
of system I/O. The DDR SDRAM interface allows server
designs to support large amounts of low-cost, high-
bandwidth main memory. With its reliable high-
bandwidth bus interfaces, Micron’s 21PAD chipset is
the perfect foundation for a dual processor server
design for Intel’s Pentium III with 512KB cache (80533/
80530 family) processors.
21PAD/22NCN
Chipset Overview
MT8LLN22NCNE
Peripheral Bus Controller
For the latest data sheet please refer to the Micron Web
site: www.micron.com/chipset.
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相關代理商/技術參數 |
參數描述 |
|---|---|
| MT8LLN22NCNE-A | 制造商:Micron Technology Inc 功能描述:COPPERTAIL CHIPSET - Trays |
| MT8LLN22NCNE-A2 | 制造商:Micron Technology Inc 功能描述:COPPERTAIL CHIPSET AND MOTHERBOARD - Trays |
| MT8LSDF3264WG-133D1 | 制造商:Micron Technology Inc 功能描述:256MB 32MX64 SYNCH DRAM MODULE MICRO DIMM 3.3V - Trays |
| MT8LSDT1664 | 制造商:Micron Technology Inc 功能描述:128MB 16MX64 SDRAM MODULE PBF DIMM 3.3V - Trays |
| MT8LSDT1664AG-10EB1 | 制造商:Micron Technology Inc 功能描述:DRAM MOD SDRAM 1GBIT 168UDIMM - Trays |
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