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參數資料
| 型號： | MT90810 |
| 廠商： | Mitel Networks Corporation |
| 英文描述： | Flexible MVIP(Multi-Vendor Integration Protocol) Interface Circuit(彈性MVIP接口電路) |
| 中文描述： | 柔性MVIP（多廠商集成協議）接口電路（彈性MVIP接口電路） |
| 文件頁數： | 1/33頁 |
| 文件大小： | 176K |
| 代理商： | MT90810 |
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Features
MVIP
and ST-BUS
compliant
MVIP Enhanced Switching with 384x384
channel capacity (256 MVIP channels; 128
local channels)
On-chip PLL for MVIP master/slave operation
Local output clocks of 2.048,4.096,8.192MHz
with programmable polarity
Local serial interface is programmable to
2.048, 4.096, or 8.192Mb/s with associated
clock outputs
Additional control output stream
Per-channel message mode
Two independently programmable groups of up
to 12 framing signals each
Motorola non-multiplexed or Intel multiplexed/
non-multiplexed microprocessor interface
Applications
Medium size digital switch matrices
MVIP interface functions
Serial bus control and monitoring
Centralized voice processing systems
Voice/Data multiplexer
Description
Mitel’s MT90810 is a Flexible MVIP Interface Circuit
(FMIC).
The
MVIP
(Multi-Vendor
Protocol) compliant device provides a complete
MVIP compliant interface between the MVIP Bus and
a wide variety of processors, telephony interfaces
and other circuits. A built-in digital time-slot switch
provides MVIP enhanced switching between the full
MVIP Bus and any combination of up to 128 full
duplex local channels of 64kbps each. An 8 bit
microprocessor port allows real-time control of
switching and programming of device configuration.
On-board clock circuitry, including both analog and
digital phase-locked loops, supports all MVIP clock
modes. The local interface supports PCM rates of
2.048, 4.096 and 8.192Mb/s, as well as parallel DMA
through the microprocessor port.
Integration
Ordering Information
MT90810AK
100 Pin PQFP
0
°
C to +70
°
C
Timing and Clock Control
(Oscillator and Analog & Digital PLLs)
Data Memory
Connection Memory
Programmable
Framing Signals
JTAG
Enhanced Switch
Microprocessor Interface
EX_8KA
EX_8KB
X2
X1/CLKIN PLL_LO
PLL_LI
FRAME
CLK8
RESET
CLK4
CLK2
LDO[0:3]
LDI[0:3]
CSTo
FGA[0:11]
FGB[0:11]
AD[0:7]
RDY/
DTACK
CS
RD/
DS
WR/
R/W
ALE
A[0:1]
DREQ[0:1] DACK[0:1]
ERR
TCK
TMS
TDI
TDO
SEC8K
C4b
C2o
F0b
DSo[0:7]
DSi[0:7]
S-P/
P-S
ISSUE 3
March 1997
Figure 1 - Functional Block Diagram
MT90810
Flexible MVIP Interface Circuit
Preliminary Information
CMOS
相關PDF資料 |
PDF描述 |
|---|---|
| MT90812 | Integrated Digital Switch (IDX)(集成數字開關) |
| MT90840AK | Distributed Hyperchannel Switch |
| MT90840AP | Distributed Hyperchannel Switch |
| MT9085B | PAC - Parallel Access Circuit(并行存取電路) |
| MT9092 | Digital Telephone with HDLC(數字電話（帶高階數據鏈路控制HDLC）) |
相關代理商/技術參數 |
參數描述 |
|---|---|
| MT90810AK | 制造商:Microsemi Corporation 功能描述: |
| MT90812 | 制造商:MITEL 制造商全稱:Mitel Networks Corporation 功能描述:Integrated Digital Switch (IDX) |
| MT90812AL | 制造商:Microsemi Corporation 功能描述:SWIT FABRIC 192 X 192 16.384MBPS 5V 64MQFP - Trays 制造商:Zarlink Semiconductor Inc 功能描述:SWIT FABRIC 192 X 192 16.384MBPS 5V 64MQFP - Trays |
| MT90812AL1 | 制造商:Microsemi Corporation 功能描述:SWIT FABRIC 192 X 192 16.384MBPS 5V 64MQFP - Trays 制造商:Microsemi Corporation 功能描述:PB FREE INTEGRATED DIGITAL SWITCH |
| MT90812AP | 制造商:MITEL 制造商全稱:Mitel Networks Corporation 功能描述:Integrated Digital Switch (IDX) |
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