
1
Motorola, Inc. 1997
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N–Channel Enhancement–Mode Silicon Gate
This advanced high voltage TMOS E–FET is designed to
withstand high energy in the avalanche mode and switch efficiently.
This new high energy device also offers a drain–to–source diode
with fast recovery time. Designed for high voltage, high speed
switching applications in power supplies, PWM motor controls and
other inductive loads, the avalanche energy capability is specified
to eliminate the guesswork in designs where inductive loads are
switched and offer additional safety margin against unexpected
voltage transients.
Avalanche Energy Capability Specified at Elevated
Temperature
Source–to–Drain Diode Recovery Time Comparable to a
Discrete Fast Recovery Diode
Low Stored Gate Charge for Efficient Switching
Internal Source–to–Drain Diode Designed to Replace External
Zener Transient Suppressor–Absorbs High Energy in the
Avalanche Mode
ESD Protected. Designed to Typically Withstand 400 V
Machine Model and 4000 V Human Body Model.
MAXIMUM RATINGS
(TJ = 25
°
C unless otherwise noted)
Rating
Symbol
Value
Unit
Drain–to–Source Voltage
VDSS
VDGR
VGS
VGSM
60
Vdc
Drain–to–Gate Voltage (RGS = 1.0 M
)
Gate–to–Source Voltage — Continuous
Gate–to–Source Voltage
— Non–Repetitive (tp
≤
10 ms)
60
Vdc
±
20
±
40
Vdc
Vpk
Drain Current — Continuous @ TC = 25
°
C
Drain Current
— Continuous @ TC = 100
°
C
Drain Current
— Single Pulse (tp
≤
10
μ
s)
Total Power Dissipation @ TC = 25
°
C
Derate above 25
°
C
Total Power Dissipation @ TA = 25
°
C (1)
ID
ID
IDM
55
35.5
165
Adc
Apk
PD
113
0.91
2.5
Watts
W/
°
C
Operating and Storage Temperature Range
TJ, Tstg
EAS
– 55 to 150
°
C
Single Pulse Drain–to–Source Avalanche Energy — Starting TJ = 25
°
C
(VDD = 25 Vdc, VDS = 60 Vdc, VGS = 10 Vdc, Peak IL = 55 Apk, L = 0.3 mH, RG = 25
)
454
mJ
Thermal Resistance — Junction to Case
Thermal Resistance
— Junction to Ambient
Thermal Resistance
— Junction to Ambient (1)
R
θ
JC
R
θ
JC
R
θ
JA
TL
1.1
62.5
50
°
C/W
Maximum Lead Temperature for Soldering Purposes, 1/8
″
from case for 10 seconds
260
°
C
(1) When surface mounted to an FR4 board using the minimum recommended pad size.
This document contains information on a new product. Specifications and information herein are subject to change without notice.
E–FET is a trademark of Motorola, Inc. TMOS is a registered trademark of Motorola, Inc.
Order this document
by MTB55N06Z/D
SEMICONDUCTOR TECHNICAL DATA
D
S
G
TMOS POWER FET
55 AMPERES
60 VOLTS
RDS(on) = 18 m
CASE 418B–02, Style 2
D2PAK
REV 1