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參數資料
| 型號： | MTC20136MB-I1 |
| 廠商： | 意法半導體 |
| 英文描述： | ADSL TRANSCEIVER CONTROLLER |
| 中文描述： | 寬帶收發器控制器 |
| 文件頁數： | 2/25頁 |
| 文件大小： | 634K |
| 代理商： | MTC20136MB-I1 |
MTC20136
2/25
Functional Description
Figure 1 is showing the global block diagram of the MTC20136. The functions can be grouped into the
following:
– Microcontroller
– External Bus Interface
– Control Interface (CTRLE)
– Peripherals
– Miscellaneous
Microcontroller
The microcontroller block includes an ARM-based microcore and its associated internal memory. 16
Kbytes on internal RAM and 128 x 32-bit words of ROM are foreseen. The ROM essentially contains the
boot sequence needed for code download at startup. The use of the ROM by the microcore is defined by
the state of the TROM pin during reset.
External Bus Interface
The External Bus Interface extends the internal microcontroller bus for connection of external devices. In
particular, the bus is used to connect to the MTC20135 or MTC20455 modem chip and to external SDRAM
(and optional FEEPROM).
The CTRLE functional block implements the ADSL modem command and data buffer and the interface
logic supporting the physical interfaces of the CTRLE.
Peripherals
The peripherals block includes two UARTS for RS232 interfacing to external systems and two general =
purpose parallel I/O lines.
Miscellaneous
This includes the clock circuitry, reset circuitry, test functions and configuration control signals.
CTRLE Interfaces
External Bus Interface
The external bus interface (EBI) provides a glueless interface to 8 and 16-bit asynchronous Flash EE-
PROM, 16 bit SDRAM devices and to slave devices with an i960-like 16 bit bus interface with multiplexed
address and data (as available on DynaMiTe chips).
The EBI provides two chip selects (E_nCS[1:0]) to be used for memory access (SRAM-like), one dedicat-
ed SDRAM chip select ((E_nCS_S) and four chip selects (E_nCS[7:4]) to be used for access to ADSL
slave devices. The chip selects all correspond to a fixed 1Mbyte memory region in the microcontroller
memory map, except for SDRAM access.
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