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參數資料
| 型號： | NAND512R3A0CZB6T |
| 廠商： | 意法半導體 |
| 英文描述： | 128 Mbit, 256 Mbit, 512 Mbit, 1 Gbit (x8/x16) 528 Byte/264 Word Page, 1.8V/3V, NAND Flash Memories |
| 中文描述： | 128兆，256兆，512兆位，1千兆位（x8/x16）528 Byte/264字的頁面，1.8V/3V，NAND閃存芯片 |
| 文件頁數： | 15/57頁 |
| 文件大小： | 410K |
| 代理商： | NAND512R3A0CZB6T |
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15/57
NAND128-A, NAND256-A, NAND512-A, NAND01G-A
MEMORY ARRAY ORGANIZATION
The memory array is made up of NAND structures
where 16 cells are connected in series.
The memory array is organized in blocks where
each block contains 32 pages. The array is split
into two areas, the main area and the spare area.
The main area of the array is used to store data
whereas the spare area is typically used to store
Error correction Codes, software flags or Bad
Block identification.
In x8 devices the pages are split into a main area
with two half pages of 256 Bytes each and a spare
area of 16 Bytes. In the x16 devices the pages are
split into a 256 Word main area and an 8 Word
spare area. Refer to
Figure 10., Memory Array Or-
ganization
.
Bad Blocks
The NAND Flash 528 Byte/ 264 Word Page devic-
es may contain Bad Blocks, that is blocks that con-
tain one or more invalid bits whose reliability is not
guaranteed. Additional Bad Blocks may develop
during the lifetime of the device.
The Bad Block Information is written prior to ship-
ping (refer to
Bad Block Management
section for
more details).
Table 4.
shows the minimum number of valid
blocks in each device. The values shown include
both the Bad Blocks that are present when the de-
vice is shipped and the Bad Blocks that could de-
velop later on.
These blocks need to be managed using Bad
Blocks Management, Block Replacement or Error
Correction Codes (refer to
SOFTWARE ALGO-
RITHMS
section).
Table 4. Valid Blocks
Figure 10. Memory Array Organization
Density of Device
Min
Max
1Gbit
8032
8192
512Mbits
4016
4096
256Mbits
2008
2048
128Mbits
1004
1024
AI07587
Block = 32 Pages
Page = 528 Bytes (512+16)
512 Bytes
512 Bytes
Spare Area
2nd half Page
(256 bytes)
B16
Block
Page
8 bits
B16
8 bits
Page Buffer, 512 Bytes
1st half Page
(256 bytes)
Block = 32 Pages
Page = 264 Words (256+8)
256 Words
256 Words
Spare Area
Main Area
W8
16 bits
W8
16 bits
Page Buffer, 264 Words
Block
Page
x8 DEVICES
x16 DEVICES
相關PDF資料 |
PDF描述 |
|---|---|
| NAND512R3A2BZA1F | 128 Mbit, 256 Mbit, 512 Mbit, 1 Gbit (x8/x16) 528 Byte/264 Word Page, 1.8V/3V, NAND Flash Memories |
| NAND512R3A2BZA1T | 128 Mbit, 256 Mbit, 512 Mbit, 1 Gbit (x8/x16) 528 Byte/264 Word Page, 1.8V/3V, NAND Flash Memories |
| NAND512R3A2BZB1E | 128 Mbit, 256 Mbit, 512 Mbit, 1 Gbit (x8/x16) 528 Byte/264 Word Page, 1.8V/3V, NAND Flash Memories |
| NAND512R3A2CZA6T | 128 Mbit, 256 Mbit, 512 Mbit, 1 Gbit (x8/x16) 528 Byte/264 Word Page, 1.8V/3V, NAND Flash Memories |
| NAND512R4A0CZA1 | 128 Mbit, 256 Mbit, 512 Mbit, 1 Gbit (x8/x16) 528 Byte/264 Word Page, 1.8V/3V, NAND Flash Memories |
相關代理商/技術參數 |
參數描述 |
|---|---|
| NAND512R3A2AZA6E | 功能描述:IC FLASH 512MBIT 55VFBGA RoHS:否 類別:集成電路 (IC) >> 存儲器 系列:- 標準包裝:576 系列:- 格式 - 存儲器:閃存 存儲器類型:閃存 - NAND 存儲容量:512M（64M x 8） 速度:- 接口:并聯 電源電壓:2.7 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 封裝/外殼:48-TFSOP（0.724"，18.40mm 寬） 供應商設備封裝:48-TSOP 包裝:托盤 其它名稱:497-5040 |
| NAND512R3A2BZA6E | 功能描述:閃存 128Mbit-1Gbit 1.8/3V RoHS:否 制造商:ON Semiconductor 數據總線寬度:1 bit 存儲類型:Flash 存儲容量:2 MB 結構:256 K x 8 定時類型: 接口類型:SPI 訪問時間: 電源電壓-最大:3.6 V 電源電壓-最小:2.3 V 最大工作電流:15 mA 工作溫度:- 40 C to + 85 C 安裝風格:SMD/SMT 封裝 / 箱體: 封裝:Reel |
| NAND512R3A2CZA6E | 功能描述:IC FLASH 512MBIT 63VFBGA RoHS:是 類別:集成電路 (IC) >> 存儲器 系列:- 產品變化通告:Product Discontinuation 26/Apr/2010 標準包裝:136 系列:- 格式 - 存儲器:RAM 存儲器類型:SRAM - 同步，DDR II 存儲容量:18M（1M x 18） 速度:200MHz 接口:并聯 電源電壓:1.7 V ~ 1.9 V 工作溫度:0°C ~ 70°C 封裝/外殼:165-TBGA 供應商設備封裝:165-CABGA（13x15） 包裝:托盤 其它名稱:71P71804S200BQ |
| NAND512R3A2CZA6F | 制造商:Micron Technology Inc 功能描述:SLC NAND Flash Parallel 1.8V 512Mbit 64M x 8bit 15us 63-Pin VFBGA T/R |
| NAND512R3A2DDI6 | 制造商:Micron Technology Inc 功能描述:NAND - Gel-pak, waffle pack, wafer, diced wafer on film |
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