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參數資料
| 型號： | NCP1083DEG |
| 廠商： | ON Semiconductor |
| 文件頁數： | 8/18頁 |
| 文件大小： | 257K |
| 描述： | IC CONV CTLR POE-PD 40W 20-TSSOP |
| 標準包裝： | 74 |
| 類型： | 以太網供電開關（PoE） |
| 應用： | 遠程外設（工業控制，相機，數據訪問） |
| 內部開關： | 是 |
| 電流限制： | 1.1A |
| 電源電壓： | 0 V ~ 57 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 20-TSSOP（0.173"，4.40mm 寬）裸露焊盤 |
| 供應商設備封裝： | 20-TSSOP-EP |
| 包裝： | 管件 |
NCP1083
http://onsemi.com
8
Table 3. OPERATING CONDITIONS
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
UVLO
Vuvlo_on
Default turn on voltage (VportP rising)
UVLO pin tied to VPORTN
1,2
38
40
V
Vuvlo_off
Default turn off voltage (VportP falling)
UVLO pin tied to VPORTN
1,2
29.5
32
V
Vhyst_int
UVLO internal hysteresis
UVLO pin tied to VPORTN
1,2
6
V
Vuvlo_pr
UVLO external programming range
UVLO pin connected to the res-
istor divider (R1 & R2).
AUX pin tied to VPORTN
1,2
For information only
13
50
V
Vuvlo_pr_aux
UVLO external programming VPORT
range with auxiliary supply support
UVLO & AUX pins configured
for auxiliary supply support
8.5
18
V
Vhyst_ext
UVLO external hysteresis
UVLO pin connected to the res-
istor divider (R1 & R2)
15
%
Uvlo_Filter
UVLO on/off filter time
For information only
90
mS
AUXILIARY SUPPLY OPERATION INPUT SUPPLY
Vaux_min1
VPORTPARTN voltage at startup
(required for VDDH > VDDH_Por_R)
VAUX rising No external load
on VDDL & VDDH
8.7
V
Vaux_min2
VPORTPARTN voltage during PWM
operation
(required for VDDH > VDDH_Por_F)
Voltage with respect to
Ivddl_load1 & Ivddh_load1 for
the load current conditions
8.5
V
AUXILIARY SUPPLY OPERATION AUX PIN
Vaux_off
Voltage range of the AUX pin where the
auxiliary supply circuit is guaranteed
not operational.
Voltage with respect to
VPORTN
1,2.
0.2
V
Vaux_on
Voltage range of the AUX pin where the
auxiliary supply circuit is guaranteed
operational.
Voltage with respect to
VPORTN
1,2
1.5
3.3
V
Raux
Total resistance value of the resistor di-
vider connected to the AUX pin (sum of
R
aux1
and R
aux3
)
Between VAUX supply &
VPORTN
1,2
25
kW
AUXILIARY SUPPLY OPERATION VDDL REGULATOR
Ivddl_load1
Current load on the VDDL pin with
VPORTP ARTN = 8.5 V
(Notes 9 and 10)
Ivddh_load + Ivddl_load <
4.5 mA
1
mA
Ivddl_load2
Current load on the VDDL pin with
VPORTP ARTN > 12.5 V
(Notes 9 and 10)
Ivddh_load + Ivddl_load <
10 mA
2.25
mA
AUXILIARY SUPPLY OPERATION VDDH REGULATOR
Ivddh_load1
Current load on the VDDH regulator
with VPORTP ARTN = 8.5 V
(Notes 9 and 10)
Ivddh_load + Ivddl_load <
4.5 mA
4.5
mA
Ivddh_load2
Current load on the VDDH regulator
with VPORTP ARTN > 12.5 V
(Notes 9 and 10)
Ivddh_load + Ivddl_load <
10 mA
10
mA
9. Ivddl_load = current flowing out of the VDDL pin.
Ivddh_load = current flowing out of the VDDH pin + current delivered to the Gate Driver (function of the frequency, VDDH voltage & MOSFET
gate capacitance).
10.See Figures 6 and 7 for specifications on the load current at lower or higher VPORTP - ARTN voltages. In case the application requires more
current capability on VDDL and VDDH, it is recommended to externally supply the VDDH pin with a bias winding from the transformer or
to add a diode between VAUX(+) and VDDH pin (verify the VAUX voltage does not exceed the VDDH voltage range).
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