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參數資料
| 型號： | NCP1601BDR2G |
| 廠商： | ON Semiconductor |
| 文件頁數： | 11/19頁 |
| 文件大小： | 257K |
| 描述： | IC PFC CTRL CRM/TRANSITION 8SOIC |
| 產品變化通告： | NCP1601BDR2G Discontinuation 11/May/2012 |
| 標準包裝： | 1 |
| 模式： | 臨界傳導（CRM），間歇式（轉換） |
| 頻率 - 開關： | 58kHz |
| 電流 - 啟動： | 17µA |
| 電源電壓： | 9.6 V ~ 18 V |
| 工作溫度： | -40°C ~ 125°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 8-SOIC（0.154"，3.90mm 寬） |
| 供應商設備封裝： | 8-SOICN |
| 包裝： | 剪切帶 (CT) |
| 其它名稱： | NCP1601BDR2GOSCT |
NCP1601A, NCP1601B
http://onsemi.com
11
be too bulky because it can pollute the power factor by
distorting the rectified sinusoidal input voltage.
Figure 26. DCM/CRM PFC Boost Converter
V
in
I
in
I
L
L
V
out
C
bulk
C
filter
PFC Methodology
NCP1601 uses a proprietary PFC methodology
particularly designed for both DCM and CRM operation.
The PFC methodology is described in this section.
Figure 27. Inductor Current in DCM
t
1
t
2
t
3
I
pk
T
time
Inductor Current
As shown in Figure 27, the inductor current I
L
of each
switchingcycle startsfromzeroinDCM. CRMis a special
case of DCM when t
3
= 0. When the PFC boost converter
MOSFET ison, the inductorcurrentI
L
increases fromzero
to I
pk
for a time duration t
1
with inductance L and input
voltage V
in
. (eq.1) is formulated.
V
in
= L
I
pk
t
1
(eq.1)
The inputfiltercapacitorC
filter
andthe front- -endedEMI
filter absorb the high- -frequency component of inductor
current. It makes the input current I
in
a low- -frequency
signal.
I
in
=
I
pk
(t
1
+ t
2
)
2 T
(eq.2a)
for DCM
I
in
=
I
pk
2
(eq.2b)
for CRM
From (eq.1) and (eq.2), the input impedance Z
in
is
formulated.
Z
in
=
V
in
I
in
=
2TL
t
1
(
t
1
+ t
2
)
(eq.3a)
for DCM
Z
in
=
V
in
I
in
=
2L
t
1
(eq.3b)
for CRM
Power factor is corrected when the input impedance Z
in
in (eq.3) are constant or slowly varying.
The MOSFET on time t
1
or PFC modulation duty is
generatedbyafeedbacksignalV
ton
andaramp. ThePFC
modulation circuit and timing diagram are shown in
Figure 28. A relationship in (eq.4) is obtained.
t
1
=
C
ramp
V
ton
I
ch
(eq.4)
Figure 28. PFC Modulation Circuit and Timing
Diagram
- -
+
closed when
output low
PFC
Modulation
Turns off
MOSFET
Ramp
3
C
ramp
I
ch
V
ton
V
ton
ramp
output
The charging current I
ch
is constant 100 mA current and
therampcapacitorC
ramp
isconstantforaparticulardesign.
Hence, according to (eq.4) the MOSFET on time t
1
is
proportional to V
ton
.
In order to protect the PFC modulation comparator, the
maximum voltage of V
ton
is limited to internal clamp
V
ton(max)
(3.9 V typical) and the ramp pin (Pin 3) is with a
9 V ESD Zener diode. The 3.9 V maximum limit of this
V
ton
indirectly limits the maximum on time.
Figure 29. V
control
Processing Circuit
+
- -
closed when zero current
2
C
control
V
control
R
1
R
2
R
3
C
1
C
3
V
ton
The V
control
processing circuit generates V
ton
from
control voltage V
control
and time information of zero
inductor current. The circuit in Figure 29 makes (eq.5)
wherethevalueofresistorR
1
ismuchhigherthanthevalue
of resistor R
2
(R
1
>> R
2
).
V
ton
=
T V
control
t
1
+ t
2
(eq.5a)
for DCM
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