參數資料
| 型號： | NL27WZ06DTT1G |
| 廠商： | ON Semiconductor |
| 文件頁數： | 1/6頁 |
| 文件大小： | 0K |
| 描述： | IC INVERTER DUAL OPN DRN 6TSOP |
| 標準包裝： | 1 |
| 系列： | 27WZ |
| 邏輯類型： | 逆變器，緩沖器 |
| 電路數： | 2 |
| 輸入數： | 1 |
| 特點： | 開路漏極 |
| 電源電壓： | 1.65 V ~ 5.5 V |
| 電流 - 靜態（最大值）： | 1µA |
| 輸出電流高，低： | -，32mA |
| 額定電壓和最大 CL 時的最大傳播延遲： | 3ns @ 5V，50pF |
| 工作溫度： | -55°C ~ 125°C |
| 安裝類型： | 表面貼裝 |
| 供應商設備封裝： | 6-TSOP |
| 封裝/外殼： | SC-74，SOT-457 |
| 包裝： | 剪切帶 (CT) |
| 其它名稱： | NL27WZ06DTT1GOSCT |
Semiconductor Components Industries, LLC, 2013
May, 2013 Rev. 10
1
Publication Order Number:
NL27WZ06/D
NL27WZ06
Dual Inverter with Open
Drain Outputs
The NL27WZ06 is a high performance dual inverter with open drain
outputs operating from a 1.65 V to 5.5 V supply.
The internal circuit is composed of multiple stages, including an
open drain output. The open drain output provides the capability to set
the output switching level to a user selectable value with an external
resistor and power supply. The logic high output value is set by the
external power supply and can be less than, equal or greater than the
VCC power supply, provided the voltage supply is less than 5.5 V.
Features
Extremely High Speed: tPD 2.4 ns (typical) at VCC = 5 V
Designed for 1.65 V to 5.5 V VCC Operation
Over Voltage Tolerant Inputs
LVTTL Compatible Interface Capability With 5 V TTL Logic
with VCC = 3 V
LVCMOS Compatible
24 mA Output Sink Capability
Near Zero Static Supply Current Substantially Reduces System
Power Requirements
Chip Complexity: FET = 72; Equivalent Gate = 18
These Devices are PbFree and are RoHS Compliant
NLV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AECQ100
Qualified and PPAP Capable
IN A2
OUT Y2
1
Figure 1. Pinout (Top View)
Figure 2. Logic Symbol
1
OUT Y1
IN A1
1
2
3
5
6
VCC
IN A1
OUT Y1
GND
IN A2
OUT Y2
4
See detailed ordering and shipping information in the package
dimensions section on page 4 of this data sheet.
ORDERING INFORMATION
MARKING
DIAGRAMS
SC88
DF SUFFIX
CASE 419B
TSOP6
DT SUFFIX
CASE 318G
PIN ASSIGNMENT
1
2
3IN A2
IN A1
GND
4
5VCC
OUT Y2
OUT Y1
6
FUNCTION TABLE
L
H
A Input
Y Output
Z
L
http://onsemi.com
1
MF M G
G
1
MF = Device Code
M
= Date Code*
G
= PbFree Package
(Note: Microdot may be in either location)
*Date Code orientation and/or position may vary
depending upon manufacturing location.
MF M G
G
M
1
6
Pin
Function
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