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參數資料
型號: P82C150AHT
廠商: NXP SEMICONDUCTORS
元件分類: 微控制器/微處理器
英文描述: 22 PIN R/A MALE PRESSFIT ATCA ZONE 1 CON
中文描述: 1 CHANNEL(S), 125K bps, LOCAL AREA NETWORK CONTROLLER, PDSO28
封裝: 7.50 MM, PLASTIC, SO-28
文件頁數: 16/36頁
文件大小: 209K
代理商: P82C150AHT
1996 Jun 19
16
Philips Semiconductors
Preliminary specification
CAN Serial Linked I/O device (SLIO) with
digital and analog port functions
P82C150
Table 8
Data Frame Byte 1
Table 9
Description of Data Frame Byte 1 bits
STATUS
REGISTER ADDRESS
RSTD
EW
BM1
BM0
A3
A2
A1
A0
SYMBOL
DESCRIPTION
Status
RSTD
It is logic 1 in the first message (‘sign-on’ message) after the successful detection of the bit rate
(bit time calibrated).
Logic 1, if the error warning limit (32) is reached. In the “sign-on” message EW is always logic 1. The
EW status bit is set when the Receive Error Counter or the Transmit Error Counter have exceeded the
Error Warning Limit of 32, also temporarily, since the last successful transmission of a message.
Bus mode status bits.
EW
BM1
BM0
Register address
A3 to A0
Register address bits.
Fig.7 P82C150 Data Frame.
handbook, full pagewidth
MHA071
0 0 1 P3 1 0 P2 P1 P0 1 0 DIR RTR
ID0
ID10
Identifier
0 0 0 0 1 1 RSTD EW BM1 BM0 A3 A2 A1 A0
reserved Data Length Code P82C150 status register address
X X X X X X X X X X X X X X X X
I/O Register data(15 to 8)
I/O Register data(7 to 0)
CONTROL FIELD
ARBITRATION FIELD
BYTE 1
BYTE 2
BYTE 3
SOF: Start Of Frame.
RTR: Remote Transmission Request.
P3 to P0: equals programmed identifier bits.
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