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參數資料
| 型號： | P87LPC762 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | Low power, low price, low pin count 20 pin microcontroller with 2 kbyte OTP |
| 中文描述： | 低功耗，低價格，低管腳數的2字節檢察官辦公室20引腳微控制器 |
| 文件頁數： | 28/57頁 |
| 文件大?。?/td> | 312K |
| 代理商： | P87LPC762 |
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Philips Semiconductors
Preliminary data
87LPC762
Low power, low price, low pin count (20 pin)
microcontroller with 2 kbyte OTP
2001 Oct 26
25
For correct activation of Brownout Detect, the V
DD
fall time must be
no faster than 50 mV/
μ
s. When V
DD
is restored, is should not rise
faster than 2 mV/
μ
s in order to insure a proper reset.
The brownout voltage (2.5 V or 3.8 V) is selected via the BOV bit in
the EPROM configuration register UCFG1. When unprogrammed
(BOV = 1), the brownout detect voltage is 2.5 V. When programmed
(BOV = 0), the brownout detect voltage is 3.8 V.
If the Brownout Detect function is not required in an application, it
may be disabled, thus saving power. Brownout Detect is disabled by
setting the control bit BOD in the AUXR1 register (AUXR1.6).
Power On Detection
The Power On Detect has a function similar to the Brownout Detect,
but is designed to work as power comes up initially, before the
power supply voltage reaches a level where Brownout Detect can
work. When this feature is activated, the POF flag in the PCON
register is set to indicate an initial power up condition. The POF flag
will remain set until cleared by software.
Power Reduction Modes
The 87LPC762 supports Idle and Power Down modes of power
reduction.
Idle Mode
The Idle mode leaves peripherals running in order to allow them to
activate the processor when an interrupt is generated. Any enabled
interrupt source or Reset may terminate Idle mode. Idle mode is
entered by setting the IDL bit in the PCON register (see Figure 19).
Power Down Mode
The Power Down mode stops the oscillator in order to absolutely
minimize power consumption. Power Down mode is entered by
setting the PD bit in the PCON register (see Figure 19).
The processor can be made to exit Power Down mode via Reset or
one of the interrupt sources shown in Table 8. This will occur if the
interrupt is enabled and its priority is higher than any interrupt
currently in progress.
In Power Down mode, the power supply voltage may be reduced to
the RAM keep-alive voltage V
RAM
. This retains the RAM contents
at the point where Power Down mode was entered. SFR contents
are not guaranteed after V
DD
has been lowered to V
RAM
, therefore
it is recommended to wake up the processor via Reset in this case.
V
DD
must be raised to within the operating range before the Power
Down mode is exited. Since the watchdog timer has a separate
oscillator, it may reset the processor upon overflow if it is running
during Power Down.
Note that if the Brownout Detect reset is enabled, the processor will
be put into reset as soon as V
DD
drops below the brownout voltage.
If Brownout Detect is configured as an interrupt and is enabled, it will
wake up the processor from Power Down mode when V
DD
drops
below the brownout voltage.
When the processor wakes up from Power Down mode, it will start
the oscillator immediately and begin execution when the oscillator is
stable. Oscillator stability is determined by counting 1024 CPU
clocks after start-up when one of the crystal oscillator configurations
is used, or 256 clocks after start-up for the internal RC or external
clock input configurations.
Some chip functions continue to operate and draw power during
Power Down mode, increasing the total power used during Power
Down. These include the Brownout Detect, Watchdog Timer, and
Comparators.
BIT
PCON.7
PCON.6
SYMBOL
SMOD1
SMOD0
FUNCTION
When set, this bit doubles the UART baud rate for modes 1, 2, and 3.
This bit selects the function of bit 7 of the SCON SFR. When 0, SCON.7 is the SM0 bit. When 1,
SCON.7 is the FE (Framing Error) flag. See Figure 26 for additional information.
Brown Out Flag. Set automatically when a brownout reset or interrupt has occurred. Also set at
power on. Cleared by software. Refer to the Power Monitoring Functions section for additional
information.
Power On Flag. Set automatically when a power-on reset has occurred. Cleared by software. Refer
to the Power Monitoring Functions section for additional information.
General purpose flag 1. May be read or written by user software, but has no effect on operation.
General purpose flag 0. May be read or written by user software, but has no effect on operation.
Power Down control bit. Setting this bit activates Power Down mode operation. Cleared when the
Power Down mode is terminated (see text).
Idle mode control bit. Setting this bit activates Idle mode operation. Cleared when the Idle mode is
terminated (see text).
PCON.5
BOF
PCON.4
POF
PCON.3
PCON.2
PCON.1
GF1
GF0
PD
PCON.0
IDL
IDL
SU01168
PD
GF0
GF1
POF
BOF
SMOD0
SMOD1
0
1
2
3
4
5
6
7
PCON
Reset Value:
30h for a Power On reset
20h for a Brownout reset
00h for other reset sources
Not Bit Addressable
Address: 87h
Figure 19. Power Control Register (PCON)
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相關代理商/技術參數 |
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| P87LPC762BD | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Low power, low price, low pin count 20 pin microcontroller with 2 kbyte OTP |
| P87LPC762BD,512 | 功能描述:8位微控制器 -MCU 80C51 2K/128 OTP RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數據總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數據 RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT |
| P87LPC762BD512 | 制造商:NXP Semiconductors 功能描述:IC 8BIT MCU 80C51 20MHZ SOIC-20 |
| P87LPC762BDH | 功能描述:8位微控制器 -MCU 80C51 2K/128 OTP RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數據總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數據 RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT |
| P87LPC762BDH,512 | 功能描述:8位微控制器 -MCU 80C51 2K/128 OTP RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數據總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數據 RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT |
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