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參數資料
| 型號： | PCA3354CH |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-bit microcontrollers with DTMF generator and 256 bytes EEPROM |
| 中文描述： | 8-BIT, MROM, 16 MHz, MICROCONTROLLER, PQFP44 |
| 封裝： | 14 X 14 X 2.20 MM, PLASTIC, QFP-44 |
| 文件頁數： | 8/32頁 |
| 文件大小： | 221K |
| 代理商： | PCA3354CH |
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1996 Dec 18
8
Philips Semiconductors
Product specification
8-bit microcontrollers with DTMF
generator and 256 bytes EEPROM
PCA3354C; PCD3354A
Fig.3 Block diagram of the frequency generator, melody output (P1.7/MDY) and DTMF clock output (DP1.7/DCO).
handbook, full pagewidth
MGB782
HGF REGISTER
CLOCK AND MELODY
CONTROL REGISTER
LGF REGISTER
INTERNAL BUS
8
fxtal
fDTMF
8
8
8
SWITCHED
CAPACITOR
BANDGAP
VOLTAGE
REFERENCE
DIGITAL
SINE WAVE
SYNTHESIZER
CLOCK
DIVIDER
DIGITAL
SINE WAVE
SYNTHESIZER
SWITCHED
CAPACITOR
LOW-PASS
FILTER
DAC
DAC
RC LOW-PASS
FILTER
TONE
PORT/MELODY
OUTPUT LOGIC
P1.7/
MDY
PORT/CLOCK
OUTPUT LOGIC
DP1.7/
DCO
square wave
6.2
Melody output (P1.7/MDY)
The melody output (P1.7/MDY) is very useful for
generating musical notes when a purely sinusoidal signal
is not required, such as for ringer applications.
The square wave (duty cycle =
12
23
or 52%) will include
the attenuated harmonics of the base frequency, which is
defined by the contents of the HGF register (Table 3).
However, even higher frequency notes may be produced
since the low-pass filtering on the TONE output is not
applied to the P1.7/MDY output. This results in the
minimum decimal value x in the HGF register (see
equation in Section 6.4) being 2 for the P1.7/MDY output,
rather than 60 for the TONE output. A sinusoidal TONE
output is produced at the same time as the melody square
wave, but due to the filtering, the higher frequency sine
waves with x < 60 will not appear at the TONE output.
Since the melody output is shared with P1.7, the port
flip-flop of P1.7 has to be set HIGH before using the
melody output. This is to avoid conflicts between melody
and port outputs. The melody output drive depends on the
configuration of port P1.7/MDY, see Chapter 13, Table 24.
6.3
DTMF clock divider and output (DP1.7/DCO)
The DTMF clock divider allows the DTMF part to run either
with the main clock frequency (f
DTMF
= f
xtal
) or with a third
of it (f
DTMF
=
1
3
×
f
xtal
) depending on the state of the divider
control bit DIV3 in register MDYCON.
For low power applications, a 3.58 MHz quartz crystal or
PXE resonator can be chosen together with the
divide-by-one function of the clock divider.
For other applications a 10.74 MHz quartz crystal or PXE
resonator may be chosen together with the divide-by-three
function of the clock divider. This triples the program speed
of the microcontroller, thereby keeping the assumed
DTMF frequency of 3.58 MHz.
Since a 3.58 MHz clock is needed for peripheral telephony
circuits such as the analog voice scrambler/descrambler
PCD4440T, a switchable DTMF clock output is provided
depending on the state of the enable clock output bit
EDCO in register MDYCON.
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