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參數(shù)資料
型號: PCD5003A
廠商: NXP Semiconductors N.V.
英文描述: Enhanced Pager Decoder for POCSAG
中文描述: 增強(qiáng)傳呼機(jī)POCSAG碼解碼器
文件頁數(shù): 35/44頁
文件大小: 233K
代理商: PCD5003A
1999 Jan 08
35
Philips Semiconductors
Product specification
Enhanced Pager Decoder for POCSAG
PCD5003A
14 AC CHARACTERISTICS
V
DD
= 2.7 V; V
SS
= 0 V; V
PR
= 2.7 V; T
amb
= 25
°
C;. f
osc
= 76800 Hz.
SYMBOLS
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
System clock
T
clk
system clock period
f
osc
= 76800 Hz
13.02
μ
s
Call alert frequencies
f
AL
alert frequency
SPF byte 03H; bits
D1, D0 = 0 0
D1, D0 = 0 1
D1, D0 = 1 0
D1, D0 = 1 1
alert set-up bit D2 = 1;
outputs ATL, ATH and LED
alert set-up bit D2 = 1;
outputs ATL and ATH
alert set-up bit D2 = 1;
outputs ATL and ATH
low-level alert
2048
2731
3200
4096
16
Hz
Hz
Hz
Hz
Hz
f
AW
warbled alert; modulation
frequency
warbled alert; high acoustic
alert frequency
warbled alert; low acoustic alert
frequency
pulsed vibrator frequency
(square wave)
f
AWH
f
AL
Hz
f
AWL
1
2
f
AL
Hz
f
VBP
25
Hz
Call alert duration
t
ALT
t
ALL
t
ALH
t
VBL
t
VBH
t
ALC
t
ALP
alert time-out period
ATL output time-out period
ATH output time-out period
VIB output time-out period
VIB output time-out period
alert cycle period
alert pulse duration
16
4
12
4
12
1
125
s
s
s
s
s
s
ms
low-level alert
high-level alert
low -level alert
high-level alert
Real-time clock reference
f
ref
real-time clock reference
frequency
SPF byte 02H; bits
D3, D2 = 0 0; note 1
D3, D2 = 0 1; note 2
D3, D2 = 1 0
D3, D2 = 1 1
all reference frequencies
except 50 Hz (square wave)
32768
50
2
1
60
13.02
Hz
Hz
Hz
Hz
μ
s
t
RFP
real-time clock reference pulse
duration
相關(guān)PDF資料
PDF描述
PCD5003AH Enhanced Pager Decoder for POCSAG
PCD5003 Advanced POCSAG Paging Decoder
PCD5003H Advanced POCSAG Paging Decoder
PCD5008 FLEX Pager Decoder
PCD5008H FLEX Pager Decoder
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