- 您現(xiàn)在的位置：買(mǎi)賣(mài)IC網(wǎng) > PDF目錄367964 > PI6C2504Q (Pericom Semiconductor Corp.) Phase-Locked Loop Clock Driver with 4 Clock Outputs PDF資料下載
參數(shù)資料
| 型號(hào)： | PI6C2504Q |
| 廠商： | Pericom Semiconductor Corp. |
| 英文描述： | Phase-Locked Loop Clock Driver with 4 Clock Outputs |
| 中文描述： | 鎖相環(huán)時(shí)鐘4時(shí)鐘輸出驅(qū)動(dòng)器 |
| 文件頁(yè)數(shù)： | 1/4頁(yè) |
| 文件大?。?/td> | 299K |
| 代理商： | PI6C2504Q |
1
PS8380A 07/17/00
1
2
3
Y1
4
Y0
CLK_IN
GND
GND
8
7
6
5
16
15
14
13
9
10
11
12
AGND
VCC
AVCC
FB_OUT
G
Y3
VCC
FB_IN
GND
VCC
Y2
Product Pin Configuration
Functional Table
Logic Block Diagram
12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012
12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012
12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012
PI6C2504
with 4 Clock Outputs
Product Description
The PI6C2504 features a low-skew, low-jitter, phase-locked loop
(PLL) clock driver, distributing high-frequency clock signals for
SDRAM and server applications. By connecting the feedback
FB_OUT output to the feedback FB_IN input, the propagation
delay from the CLK_IN input to any clock output will be nearly zero.
Product Features
High-Performance Phase-Locked-Loop Clock
Distribution for Networking
Registered DIMM Synchronous DRAM modules
for server/workstation/PC applications
Allows Clock Input to have Spread Spectrum
modulation for EMI reduction
Zero Input-to-Output delay
Low jitter: Cycle-to-Cycle jitter ±100ps max.
On-chip series damping resistor at clock output
drivers for low noise and EMI reduction
Operates at 3.3V V
CC
Wide range of Clock Frequencies up to 80 MHz
Package: Plastic 16-pin QSOP Package (Q)
s
p
n
I
s
p
O
G
]
Y
T
U
O
_
B
F
L
L
N
I
K
L
C
H
N
I
K
L
C
N
I
K
L
C
16-Pin
Q
CLK_IN
FB_IN
PLL
AVCC
FB_OUT
Y[0:3]
4
G
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| PI6C2510-133 | Low-Noise, Phase-Locked Loop Clock Driver with 10 Clock Outputs |
| PI6C2516 | Phase-Locked Loop Clock Driver with 16 Clock Outputs |
| PI6C2516A | Phase-Locked Loop Clock Driver with 16 Clock Outputs |
| PI6C2972 | Low Voltage PLL Clock Driver |
| PI6C2972FC | Low Voltage PLL Clock Driver |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| PI6C2504QE | 功能描述:鎖相環(huán) - PLL 3.3v PLL Clock Drivr RoHS:否 制造商:Silicon Labs 類(lèi)型:PLL Clock Multiplier 電路數(shù)量:1 最大輸入頻率:710 MHz 最小輸入頻率:0.002 MHz 輸出頻率范圍:0.002 MHz to 808 MHz 電源電壓-最大:3.63 V 電源電壓-最小:1.71 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:QFN-36 封裝:Tray |
| PI6C2504QEX | 功能描述:鎖相環(huán) - PLL 3.3v PLL Clock Drivr RoHS:否 制造商:Silicon Labs 類(lèi)型:PLL Clock Multiplier 電路數(shù)量:1 最大輸入頻率:710 MHz 最小輸入頻率:0.002 MHz 輸出頻率范圍:0.002 MHz to 808 MHz 電源電壓-最大:3.63 V 電源電壓-最小:1.71 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:QFN-36 封裝:Tray |
| PI6C2509-133 | 制造商:PERICOM 制造商全稱(chēng):Pericom Semiconductor Corporation 功能描述:Low-Noise Phase-Locked Loop Clock Driver with 9 Clock Outputs |
| PI6C2509-133L | 制造商:Pericom Semiconductor Corporation 功能描述:Zero Delay PLL Clock Driver Single 25MHz to 150MHz 24-Pin TSSOP 制造商:Pericom Semiconductor Corporation 功能描述:6C SERIES, PLL BASED CLOCK DRIVER, 9 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO24 |
| PI6C2509-133LE | 功能描述:鎖相環(huán) - PLL Zero Delay Clck Drvr RoHS:否 制造商:Silicon Labs 類(lèi)型:PLL Clock Multiplier 電路數(shù)量:1 最大輸入頻率:710 MHz 最小輸入頻率:0.002 MHz 輸出頻率范圍:0.002 MHz to 808 MHz 電源電壓-最大:3.63 V 電源電壓-最小:1.71 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:QFN-36 封裝:Tray |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。