參數資料
| 型號： | PI74ALVCH16501A |
| 廠商： | Pericom |
| 文件頁數： | 1/5頁 |
| 文件大小： | 0K |
| 描述： | IC UNIV BUS TXRX 16BIT 56TSSOP |
| 產品變化通告： | Product Discontinuation 08/Jul/2005 |
| 標準包裝： | 35 |
| 系列： | 74ALVCH |
| 邏輯類型： | 通用總線收發器 |
| 電路數： | 16 位 |
| 輸出電流高，低： | 24mA，24mA |
| 電源電壓： | 2.3 V ~ 3.6 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 56-TFSOP（0.240"，6.10mm 寬） |
| 供應商設備封裝： | 56-TSSOP |
| 包裝： | 管件 |
1
PS8133A
01/31/00
12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012
PI74ALVCH16501
18-Bit Universal Bus Transceiver
With 3-State Outputs
Logic Block Diagram
Product Description
Pericom Semiconductor’s PI74ALVCH series of logic circuits are
produced in the Company’s advanced 0.5 micron CMOS technology,
achieving industry leading speed.
The 18-bit PI74ALVCH16501 univeral bus transceiver is designed
for 2.3V to 3.6V VCC operation.
Data flow in each direction is controlled by Output Enable (OEAB
and OEBA), Latched Enable (LEAB and LEBA), and CLOCK
(CLKAB and CLKBA) inputs. For A-to-B data flow, the device
operates in the transparent mode when LEAB is HIGH. When LEAB
is LOW, the A data is latched if CLKAB is held at a high or low logic
level. If LEAB is LOW, the A-bus is stored in the latch/flip-flop on
the low-to-high transition of CLKAB. When OEAB is HIGH, the
outputs are active. When OEAB is LOW, the outputs are in the high-
impedance state.
Data flow for B to A is similar to that of A to B but uses OEBA, LEBA,
and CLKBA. The Output Enables are complementary (OEAB is
active HIGH and OEBA is active LOW).
To ensure the high-impedance state during power up or power
down, OEBA should be tied to VCC through a pull-up resistor and
OEAB should be tied to GND through a pulldown resistor; the
minimum value of the resistor is determined by the current-sinking
capability of the driver.
Active bus-hold circuitry is provided to hold unused or floating
data inputs at a valid logic level.
Product Features
PI74ALVCH16501 is designed for low voltage operation
VCC =2.3Vto3.6V
Hysteresis on all inputs
Typical VOLP (Output Ground Bounce)
< 0.8V at VCC = 3.3V, TA = 25°C
Typical VOHV (Output VOH Undershoot)
< 2.0V at VCC = 3.3V, TA = 25°C
Bus Hold retains last active bus state during 3-STATE
eliminating the need for external pullup resistors
Industrial operation at –40°C to +85°C
Packages available:
– 48-pin 240 mil wide plastic TSSOP (A)
– 48-pin 300 mil wide plastic SSOP (V)
相關PDF資料 |
PDF描述 |
|---|---|
| PI74ALVCH16646A | IC TRANSCVR DUAL N-INV 56TSSOP |
| PI74ALVCH16652A | IC 16-BIT BUS TXCVR/REG 56-TSSOP |
| PI74ALVCH16721A | IC 20-BIT FLIP-FLOP 56-TSSOP |
| PI74ALVCH16823A | IC 18-BIT INTERFACE-F/F 56-TSSOP |
| PI74ALVCHR162245AEX | IC TXRX 16BIT BIDIR 3ST 48TSSOP |
相關代理商/技術參數 |
參數描述 |
|---|---|
| PI74ALVCH16501V | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:18-Bit Bus Transceiver |
| PI74ALVCH16524 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Logic | 18-Bit Registered Bus Exchanger |
| PI74ALVCH16524A | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:18-Bit Bus Transceiver |
| PI74ALVCH16524V | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:18-Bit Bus Transceiver |
| PI74ALVCH16543 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Logic | 16-Bit Registered Transceiver |
發布緊急采購，3分鐘左右您將得到回復。