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參數資料
| 型號： | PSD312-70JM |
| 廠商： | 意法半導體 |
| 英文描述： | High Speed PWM Controller 20-PLCC 0 to 70 |
| 中文描述： | 低成本現場可編程微控制器外圍設備 |
| 文件頁數： | 11/85頁 |
| 文件大小： | 691K |
| 代理商： | PSD312-70JM |
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PSD3XX Famly
8
Name
Type
Description
When the data bus is 8 bits:
This pin is for 8031 or compatible MCUs that use PSEN to
separate program space from data space. In this case, PSEN is
used for reads from the EPROM.
Note:
if your MCU does
not
output a PSEN signal, pull up this pin to V
CC
.
When the data bus is 16 bits:
This pin is BHE. When low, D8-D15 are read from or written to.
Note:
in programming mode, this pin is pulsed between V
PP
and 0 V.
The following control signals can be connected to this port, based on
your MCU (and the way you configure the PSD in PSDsoft):
1. WR—active-low write pulse.
2. R/W—active-high read/active-low write input.
Note:
in programming mode, this pin
must
be tied to V
PP
.
The following control signals can be connected to this port, based on
your MCU (and the way you configure the PSD in PSDsoft):
1. RD—active-low read input.
2. E—E clock input.
3. DS—active-low data strobe input (3X2/3X3 devices only)
BHE/
PSEN
I
WR/V
PP
or
R/W/V
PP
I
RD/E/DS
I
The following control signals can be connected to this port:
1. CSI—Active-low chip select input. If your MCU supports a chip
select output, and you want the PSD to save power when not
selected, use this pin as a chip select input.
2. If you don’t wish to use the CSI feature, you may use this pin as
an additional input (logic or address) to the PAD. A19 can be
latched (with ALE/AS), or a transparent logic input.
A19/CSI
I
PSD3XX/ZPSD3XX:
This pin is user-programmable and can be configured to reset on a
high- or low-level input. Reset must be applied for at least 100 ns.
ZPSD3XXV:
This pin is
not
configurable, and the chip will only reset on an
active-low level input. Reset must be applied for at least 500 ns,
and no operations may take place for an additional 500 ns minimum.
(See Figure 8.)
Reset
I
If you use an MCU that has a multiplexed bus:
Connect ALE or AS to this pin. The polarity of this pin is configurable.
The trailing edge of ALE/AS latches all multiplexed address inputs
(and BHE where applicable).
If you use an MCU that does not have a multiplexed bus:
If your MCU uses ALE/AS, connect the signal to this pin.
Otherwise, use this pin for a generic logic input to the PAD.
(Non-3X1 devices only.)
ALE/AS
I
These pins make up Port A. These port pins are configurable, and
can have the following functions: (see Figure 5A and 5B)
1. Track AD7-AD0. This feature repeats the MCU address and data
bus on all Port A pins.
2. MCU I/O—in this mode, the direction of the pin is defined by its
direction bit, which resides in the direction register.
3. Latched address output.
4. CMOS or open-drain output.
5.
If your MCU is non-multiplexed:
data bus input—connect your
data bus (D0-7) to these pins. See Figure 3.
PA0
PA1
PA2
PA3
PA4
PA5
PA6
PA7
I/O
Legend:
The Type column abbreviations are: I = input only; I/O = input/output; P = power.
Table 2.
PSD3XX Pin
Descriptions
相關PDF資料 |
PDF描述 |
|---|---|
| PSD312-90J | Low Cost Field Programmable Microcontroller Peripherals |
| PSD312-90JI | High Speed PWM Controller 16-SOIC 0 to 70 |
| PSD312-90JM | Low Cost Field Programmable Microcontroller Peripherals |
| PSD312-A-15J | High Speed PWM Controller 16-SOIC 0 to 70 |
| PSD312-A-15JI | High Speed PWM Controller 16-SOIC 0 to 70 |
相關代理商/技術參數 |
參數描述 |
|---|---|
| PSD312-70LI | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Field-Programmable Peripheral |
| PSD312-70LM | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Field-Programmable Peripheral |
| PSD312-70Q | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Field-Programmable Peripheral |
| PSD312-70QI | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Field-Programmable Peripheral |
| PSD312-70U | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Field-Programmable Peripheral |
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