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參數(shù)資料
型號(hào): PSD913315MT
廠商: 意法半導(dǎo)體
英文描述: Flash In-System Programmable ISP Peripherals For 8-bit MCUs
中文描述: Flash在系統(tǒng)可編程ISP的外設(shè)的8位微控制器
文件頁(yè)數(shù): 76/110頁(yè)
文件大小: 1737K
代理商: PSD913315MT
PSD813F2, PSD833F2, PSD834F2, PSD853F2, PSD854F2
76/110
DC AND AC PARAMETERS
This section summarizes the operating and mea-
surement conditions, and the DC and AC charac-
teristics of the device. The parameters in the DC
and AC Characteristic tables that follow are de-
rived from tests performed under the Measure-
ment Conditions summarized in the relevant
tables. Designers should check that the operating
conditions in their circuit match the measurement
conditions when relying on the quoted parame-
ters.
Table 39. Operating Conditions (5V devices)
Table 40. Operating Conditions (3V devices)
Table 41. AC Signal Letters for PLD Timing
Note: Example: t
AVLX
= Time from Address Valid to ALE Invalid.
Table 42. AC Signal Behavior Symbols for PLD
Timing
Note: Example: t
AVLX
= Time from Address Valid to ALE Invalid.
Table 43. AC Measurement Conditions
Note: 1. Output Hi-Z is defined as the point where data out is no longer driven.
Symbol
Parameter
Min.
Max.
Unit
V
CC
Supply Voltage
4.5
5.5
V
T
A
Ambient Operating Temperature (industrial)
–40
85
°C
Ambient Operating Temperature (commercial)
0
70
°C
Symbol
Parameter
Min.
Max.
Unit
V
CC
Supply Voltage
3.0
3.6
V
T
A
Ambient Operating Temperature (industrial)
–40
85
°C
Ambient Operating Temperature (commercial)
0
70
°C
A
Address Input
C
CEout Output
D
Input Data
E
E Input
G
Internal WDOG_ON signal
I
Interrupt Input
L
ALE Input
N
RESET Input or Output
P
Port Signal Output
Q
Output Data
R
WR, UDS, LDS, DS, IORD, PSEN Inputs
S
Chip Select Input
T
R/W Input
W
Internal PDN Signal
B
V
STBY
Output
M
Output Macrocell
t
Time
L
Logic Level Low or ALE
H
Logic Level High
V
Valid
X
No Longer a Valid Logic Level
Z
Float
PW
Pulse Width
Symbol
Parameter
Min.
Max.
Unit
C
L
Load Capacitance
30
pF
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