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參數資料
型號： PSD9135V20JIT
廠商： 意法半導體
英文描述： 2.5V / 3.3V ECL 1:2 Differential Fanout Buffer; Package: SOIC-8 Narrow Body; No of Pins: 8; Container: Rail; Qty per Container: 98
中文描述： Flash在系統可編程ISP的外設的8位微控制器
文件頁數： 96/110頁
文件大小： 1737K
代理商： PSD9135V20JIT
PSD813F2, PSD833F2, PSD834F2, PSD853F2, PSD854F2
96/110
Table 64. Port A Peripheral Data Mode WRITE Timing (3V devices)
Note: 1. RD has the same timing as DS, LDS, UDS, and PSEN (in 8031 combined mode).
2. WR has the same timing as the E, LDS, UDS, WRL, and WRH signals.
3. Any input used to select Port A Data Peripheral mode.
4. Data is already stable on Port A.
5. Data stable on ADIO pins to data on Port A.
Figure 49. Reset (RESET) Timing
Table 65. Reset (RESET) Timing (5V devices)
Note: 1. Reset (RESET) does not reset Flash memory Program or Erase cycles.
2. Warm reset aborts Flash memory Program or Erase cycles, and puts the device in READ Mode.
Table 66. Reset (RESET) Timing (3V devices)
Note: 1. Reset (RESET) does not reset Flash memory Program or Erase cycles.
2. Warm reset aborts Flash memory Program or Erase cycles, and puts the device in READ Mode.
Symbol
Parameter
Conditions
-12
-15
-20
Unit
Min
Max
Min
Max
Min
Max
t
WLQV–PA
WR to Data Propagation Delay
(Note
2
)
42
45
55
ns
t
DVQV–PA
Data to Port A Data Propagation Delay
(Note
5
)
38
40
45
ns
t
WHQZ–PA
WR Invalid to Port A Tri-state
(Note
2
)
33
33
35
ns
Symbol
Parameter
Conditions
Min
Max
Unit
t
NLNH
RESET Active Low Time
1
150
ns
t
NLNH–PO
Power On Reset Active Low Time
1
ms
t
NLNH–A
Warm Reset (on the PSD834Fx)
2
25
μ
s
t
OPR
RESET High to Operational Device
120
ns
Symbol
Parameter
Conditions
Min
Max
Unit
t
NLNH
RESET Active Low Time
1
300
ns
t
NLNH–PO
Power On Reset Active Low Time
1
ms
t
NLNH–A
Warm Reset (on the PSD834Fx)
2
25
μ
s
t
OPR
RESET High to Operational Device
300
ns
tNLNH-PO
Power-On Reset
tOPR
AI02866b
RESET
tNLNH
tNLNH-A
Warm Reset
tOPR
V
CC
V
CC
(min)
相關PDF資料
PDF描述
PSD9135V20JT 2.5V / 3.3V ECL 1:2 Differential Fanout Buffer; Package: SOIC-8 Narrow Body; No of Pins: 8; Container: Rail; Qty per Container: 98
PSD9135V20MIT 2.5V / 3.3V ECL 1:2 Differential Fanout Buffer; Package: SOIC-8 Narrow Body; No of Pins: 8; Container: Tape and Reel; Qty per Container: 2500
PSD9135V20MT 2.5V / 3.3V ECL 1:2 Differential Fanout Buffer; Package: SOIC-8 Narrow Body; No of Pins: 8; Container: Tape and Reel; Qty per Container: 2500
PSD9135V70MT 2.5V / 3.3V ECL 1:2 Differential Fanout Buffer; Package: TSSOP 8 3.0x3.0x0.95 mm; No of Pins: 8; Container: Rail; Qty per Container: 100
PSD9135V90MT 2.5V / 3.3V ECL 1:2 Differential Fanout Buffer; Package: TSSOP 8 3.0x3.0x0.95 mm; No of Pins: 8; Container: Rail; Qty per Container: 100
相關代理商/技術參數
參數描述
PSD9135V20JT 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Flash In-System Programmable ISP Peripherals For 8-bit MCUs
PSD9135V20MIT 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Flash In-System Programmable ISP Peripherals For 8-bit MCUs
PSD9135V20MT 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Flash In-System Programmable ISP Peripherals For 8-bit MCUs
PSD9135V70JIT 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Flash In-System Programmable ISP Peripherals For 8-bit MCUs
PSD9135V70JT 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Flash In-System Programmable ISP Peripherals For 8-bit MCUs
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