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參數(shù)資料
| 型號(hào)： | Q67100-H3522 |
| 廠商： | SIEMENS AG |
| 英文描述： | 8/16 Kbit 1024/2048 x 8 bit Serial CMOS EEPROMs, I2C Synchronous 2-Wire Bus, Page Protection Mode |
| 中文描述： | 8 / 16千位二千〇四十八分之一千〇二十四× 8位串行CMOS EEPROM的，I2C同步2線巴士，頁面保護(hù)模式 |
| 文件頁數(shù)： | 19/53頁 |
| 文件大?。?/td> | 418K |
| 代理商： | Q67100-H3522 |
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HYB 39S64400/800/160BT(L)
64-MBit Synchronous DRAM
Data Book
19
12.99
Notes
1. For proper power-up see the operation section of this data sheet.
2. AC timing tests have
V
IL
= 0.4 V and
V
IH
= 2.4 V with the timing referenced to the 1.4 V crossover
point. The transition time is measured between
V
IH
and
V
IL
. All AC measurements assume
t
T
= 1 ns with the AC output load circuit shown in figure below. Specified
t
AC
and
t
OH
parameters
are measured with a 50 pF only, without any resistive termination and with a input signal of 1V /
ns edge rate between 0.8 V and 2.0 V.
3. If clock rising time is longer than 1 ns, a time (
t
T
/2
0.5) ns has to be added to this parameter.
4. If
t
T
is longer than 1 ns, a time (
t
T
1) ns has to be added to this parameter.
5. These parameter account for the number of clock cycle and depend on the operating frequency
of the clock, as follows:
the number of clock cycle = specified value of timing period (counted in fractions as a whole
number)
6. Self Refresh Exit is a synchronous operation and begins on the 2nd positive clock edge after
CKE returns high. Self Refresh Exit is not complete until a time period equal to
t
RC
is satisfied
once the Self Refresh Exit command is registered.
SPT03404
CLOCK
2.4 V
0.4 V
INPUT
HOLD
t
SETUP
t
t
T
OUTPUT
1.4 V
t
LZ
AC
t
t
AC
OH
t
HZ
t
1.4 V
CL
t
CH
t
50 pF
I/O
Measurement conditions for
t
AC
and
t
OH
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| Q67100-H3523 | 8/16 Kbit 1024/2048 x 8 bit Serial CMOS EEPROMs, I2C Synchronous 2-Wire Bus, Page Protection Mode |
| Q67100-H3524 | 8/16 Kbit 1024/2048 x 8 bit Serial CMOS EEPROMs, I2C Synchronous 2-Wire Bus, Page Protection Mode |
| Q67100-H3525 | 4 Kbit 512 x 8 bit Serial CMOS EEPROMs, I2C Synchronous 2-Wire Bus, Page Protection Mode |
| Q67100-H3526 | 4 Kbit 512 x 8 bit Serial CMOS EEPROMs, I2C Synchronous 2-Wire Bus, Page Protection Mode |
| Q67100-H3527 | 4 Kbit 512 x 8 bit Serial CMOS EEPROMs, I2C Synchronous 2-Wire Bus, Page Protection Mode |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| Q67100-H3523 | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:8/16 Kbit 1024/2048 x 8 bit Serial CMOS EEPROMs, I2C Synchronous 2-Wire Bus, Page Protection Mode |
| Q67100-H3524 | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:8/16 Kbit 1024/2048 x 8 bit Serial CMOS EEPROMs, I2C Synchronous 2-Wire Bus, Page Protection Mode |
| Q67100-H3525 | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:4 Kbit 512 x 8 bit Serial CMOS EEPROMs, I2C Synchronous 2-Wire Bus, Page Protection Mode |
| Q67100-H3526 | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:4 Kbit 512 x 8 bit Serial CMOS EEPROMs, I2C Synchronous 2-Wire Bus, Page Protection Mode |
| Q67100-H3527 | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:4 Kbit 512 x 8 bit Serial CMOS EEPROMs, I2C Synchronous 2-Wire Bus, Page Protection Mode |
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