- 您現在的位置：買賣IC網 > PDF目錄361238 > Q67100-Q1120 (SIEMENS AG) 3.3V 4M x 4-Bit EDO-Dynamic RAM PDF資料下載
參數資料
| 型號： | Q67100-Q1120 |
| 廠商： | SIEMENS AG |
| 英文描述： | 3.3V 4M x 4-Bit EDO-Dynamic RAM |
| 中文描述： | 3.3 4米× 4位江戶動態隨機存儲器 |
| 文件頁數： | 19/53頁 |
| 文件大?。?/td> | 418K |
| 代理商： | Q67100-Q1120 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁當前第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁
HYB 39S64400/800/160BT(L)
64-MBit Synchronous DRAM
Data Book
19
12.99
Notes
1. For proper power-up see the operation section of this data sheet.
2. AC timing tests have
V
IL
= 0.4 V and
V
IH
= 2.4 V with the timing referenced to the 1.4 V crossover
point. The transition time is measured between
V
IH
and
V
IL
. All AC measurements assume
t
T
= 1 ns with the AC output load circuit shown in figure below. Specified
t
AC
and
t
OH
parameters
are measured with a 50 pF only, without any resistive termination and with a input signal of 1V /
ns edge rate between 0.8 V and 2.0 V.
3. If clock rising time is longer than 1 ns, a time (
t
T
/2
0.5) ns has to be added to this parameter.
4. If
t
T
is longer than 1 ns, a time (
t
T
1) ns has to be added to this parameter.
5. These parameter account for the number of clock cycle and depend on the operating frequency
of the clock, as follows:
the number of clock cycle = specified value of timing period (counted in fractions as a whole
number)
6. Self Refresh Exit is a synchronous operation and begins on the 2nd positive clock edge after
CKE returns high. Self Refresh Exit is not complete until a time period equal to
t
RC
is satisfied
once the Self Refresh Exit command is registered.
SPT03404
CLOCK
2.4 V
0.4 V
INPUT
HOLD
t
SETUP
t
t
T
OUTPUT
1.4 V
t
LZ
AC
t
t
AC
OH
t
HZ
t
1.4 V
CL
t
CH
t
50 pF
I/O
Measurement conditions for
t
AC
and
t
OH
相關PDF資料 |
PDF描述 |
|---|---|
| Q67100-Q1127 | 3.3V 4M x 4-Bit EDO-Dynamic RAM |
| Q67100-Q1128 | 3.3V 4M x 4-Bit EDO-Dynamic RAM |
| Q67100-Q1135 | 3.3V 4M x 4-Bit EDO-Dynamic RAM |
| Q67101-H5173-A701 | DDC-PLUS-Deflection Controller |
| Q67101-H6788 | ICs for Communications |
相關代理商/技術參數 |
參數描述 |
|---|---|
| Q67100-Q1127 | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:3.3V 4M x 4-Bit EDO-Dynamic RAM |
| Q67100-Q1128 | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:3.3V 4M x 4-Bit EDO-Dynamic RAM |
| Q67100-Q1135 | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:3.3V 4M x 4-Bit EDO-Dynamic RAM |
| Q67100-Q1136 | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:3.3V 4M x 4-Bit EDO-Dynamic RAM |
| Q67100-Q1143 | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:3.3V 4M x 4-Bit EDO-Dynamic RAM |
發布緊急采購，3分鐘左右您將得到回復。