- 您現在的位置：買賣IC網 > PDF目錄361235 > Q67100-Q651 (SIEMENS AG) 1M x 36-Bit Dynamic RAM Module (2M x 18-Bit Dynamic RAM Module) PDF資料下載
參數資料
| 型號： | Q67100-Q651 |
| 廠商： | SIEMENS AG |
| 英文描述： | 1M x 36-Bit Dynamic RAM Module (2M x 18-Bit Dynamic RAM Module) |
| 中文描述： | 100萬× 36位動態RAM模塊（2米× 18位動態隨機存儲器模塊） |
| 文件頁數： | 14/53頁 |
| 文件大小： | 418K |
| 代理商： | Q67100-Q651 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁當前第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁
HYB 39S64400/800/160BT(L)
64-MBit Synchronous DRAM
Data Book
14
12.99
Burst Termination
Once a burst read or write operation has been initiated, there are several methods in which to
terminate the burst operation prematurely. These methods include using another Read or Write
Command to interrupt an existing burst operation, use a Precharge Command to interrupt a burst
cycle and close the active bank, or using the Burst Stop Command to terminate the existing burst
operation but leave the bank open for future Read or Write Commands to the same page of the
active bank. When interrupting a burst with another Read or Write Command care must be taken to
avoid DQ contention. The Burst Stop Command, however, has the fewest restrictions making it the
easiest method to use when terminating a burst operation before it has been completed. If a Burst
Stop command is issued during a burst write operation, then any residual data from the burst write
cycle will be ignored. Data that is presented on the DQ pins before the Burst Stop Command is
registered will be written to the memory.
A10
BA0
BA1
0
0
0
Bank 0
0
0
1
Bank 1
0
1
0
Bank 2
0
1
1
Bank 3
1
x
x
all Banks
相關PDF資料 |
PDF描述 |
|---|---|
| Q67100-Q727 | 256k x 16-Bit Dynamic RAM |
| Q67100-Q741 | 1M x 36-Bit Dynamic RAM Module (2M x 18-Bit Dynamic RAM Module) |
| Q67100-Q749 | 1M x 4-Bit Dynamic RAM Low Power 1M x 4-Bit Dynamic RAM |
| Q67100-H3500 | 16 Kbit 2048 x 8 bit Serial CMOS EEPROMs, I2C Synchronous 2-Wire Bus |
| Q67100-H3501 | 16 Kbit 2048 x 8 bit Serial CMOS EEPROMs, I2C Synchronous 2-Wire Bus |
相關代理商/技術參數 |
參數描述 |
|---|---|
| Q67100-Q727 | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:256k x 16-Bit Dynamic RAM |
| Q67100-Q741 | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:1M x 36-Bit Dynamic RAM Module (2M x 18-Bit Dynamic RAM Module) |
| Q67100-Q749 | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:1M x 4-Bit Dynamic RAM Low Power 1M x 4-Bit Dynamic RAM |
| Q67100-Q750 | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:1M x 4-Bit Dynamic RAM Low Power 1M x 4-Bit Dynamic RAM |
| Q67100-Q751 | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:1M x 4-Bit Dynamic RAM Low Power 1M x 4-Bit Dynamic RAM |
發布緊急采購，3分鐘左右您將得到回復。