- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄376314 > RM7000-263S (PMC-Sierra, Inc.) RM7000⑩ Microprocessor with On-Chip Secondary Cache Datasheet Released PDF資料下載
參數(shù)資料
| 型號： | RM7000-263S |
| 廠商： | PMC-Sierra, Inc. |
| 英文描述： | RM7000⑩ Microprocessor with On-Chip Secondary Cache Datasheet Released |
| 中文描述： | RM7000⑩微處理器與片上二級高速緩存數(shù)據(jù)發(fā)布 |
| 文件頁數(shù)： | 7/54頁 |
| 文件大小： | 901K |
| 代理商： | RM7000-263S |
第1頁第2頁第3頁第4頁第5頁第6頁當(dāng)前第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁
RM7000A
Microprocessor with On-Chip Secondary Cache Datasheet
Proprietary and Confidential to PMC-Sierra, Inc and for its Customer
’
s Internal Use
Document ID: PMC-2002175, Issue 1
7
Released
List of Figures
Figure 1
Figure 2
Figure 3
Figure 4
Figure 5
Figure 6
Figure 7
Figure 8
Figure 9
Figure 10 Processor Block Write ..............................................................................................31
Figure 11 Multiple Outstanding Reads ......................................................................................31
Figure 12 Clock Timing .............................................................................................................49
Figure 13 Input Timing ..............................................................................................................49
Figure 14 Output Timing ...........................................................................................................49
Block Diagram ..........................................................................................................10
CP0 Registers ...........................................................................................................12
Instruction Issue Paradigm .......................................................................................13
Pipeline 1...................................................................................................................4
CP0 Registers ...........................................................................................................18
Kernel Mode Virtual Addressing (32-bit mode) .........................................................19
Tertiary Cache Hit and Miss .....................................................................................25
Typical Embedded System Block Diagram ...............................................................28
Processor Block Read ..............................................................................................30
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| RM7000-266T | RM7000⑩ Microprocessor with On-Chip Secondary Cache Datasheet Released |
| RM7000-300S | RM7000⑩ Microprocessor with On-Chip Secondary Cache Datasheet Released |
| RM7000-300T | RM7000⑩ Microprocessor with On-Chip Secondary Cache Datasheet Released |
| RM7935 | 64-bit Microprocessors with Integrated L2 Cache and EJTAG |
| RM7965 | 64-bit Microprocessors with Integrated L2 Cache and EJTAG |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| RM7000-266T | 制造商:QED 功能描述:Microprocessor, 64 Bit, 304 Pin, Plastic, BGA |
| RM7000-300T | 制造商:QED 功能描述: 制造商:QED 功能描述:Microprocessor, 64 Bit, 304 Pin, Plastic, BGA |
| RM7000A | 制造商:PMC 制造商全稱:PMC 功能描述:64-Bit MIPS RISC Microprocessor with Integrated L2 Cache |
| RM7000A-300T | 制造商:Quantum Effect Devices 功能描述:64-BIT, 300 MHz, MICROPROCESSOR, 304 Pin Plastic BGA |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。