
1
PF918-04
S1C63358
4-bit Single Chip Microcomputer
s DESCRIPTION
The S1C63358 is a microcomputer which has a high-performance 4-bit CPU S1C63000 as the core CPU, ROM
(8,192 words
× 13 bits), RAM (512 words × 4 bits), serial interface, watchdog timer, programmable timer, time
base counter (1 system), SVD circuit, a segment type LCD driver that can drive a maximum 32 segments
× 4
commons, a 4-channel A/D converter and a special input port that can implement key position discrimination
function using with the A/D converter. The S1C63358 features low voltage/high speed (4 MHz Max.) operation
and low current consumption while the LCD is ON (current consumption in HALT: 2.5 A), this makes it suitable
for battery driven portable equipment such as a head phone stereo.
s FEATURES
q OSC1 oscillation circuit ........................... 32.768 kHz (Typ.) Crystal oscillation circuit or CR oscillation circuit (
1)
q OSC3 oscillation circuit ........................... 1.8 MHz (Typ.) CR or 4 MHz (Max.) Ceramic oscillation circuit (
1)
Operatable in 2.3 V
q Instruction set .......................................... Basic instruction: 46 types (411 instructions with all)
Addressing mode: 8 types
q Instruction execution time ....................... During operation at 32.768 kHz: Min. 61 sec
During operation at 4 MHz:
Min. 0.5 sec
q ROM capacity ......................................... Code ROM:
8,192 words
× 13 bits
q RAM capacity .......................................... Data memory:
512 words
× 4 bits
Display memory: 32 words
× 4 bits
q Input port ................................................. 9 bits 8 bits (Pull-up resistors may be supplemented
1)
1 bit (Input interrupt for key position sensing by A/D)
q Output port .............................................. 12 bits (It is possible to switch the 2 bits to special output
2)
q I/O port .................................................... 20 bits (It is possible to switch the 4 bits to serial input/output
2)
(It is possible to switch the 4 bits to A/D input
2)
q Serial interface ........................................ 1 port (8-bit clock synchronous system)
q LCD driver ............................................... 32 segments
× 4, 3 or 2 commons (2) 1/3 or 1/2 bias drive (1)
q Time base counter .................................. 1 system (Clock timer)
q Programmable timer ............................... Built-in, 2 channels
× 8 bits, with event counter function
or 1 channel
× 16 bits (2)
q Watchdog timer ....................................... Built-in
q A/D converter .......................................... 8-bit resolution
Maximum error:
±3 LSB, A/D clock: OSC1, OSC3, 2.7 V to 3.6 V
±3 LSB, A/D clock: OSC1, OSC3
≤ 2.5 MHz, 2.3 V to 2.7 V
±5 LSB, A/D clock: OSC1, 1.6 V to 2.3 V
±5 LSB, A/D clock: OSC1, 0.9 V to 1.6 V
q Buzzer output .......................................... Buzzer frequency: 2 kHz or 4 kHz (
2), 2 Hz interval (2)
q Supply voltage detection (SVD) circuit ... 16 values, programmable (1.05 V to 2.60 V)
Low
Voltage
Operation
Products
q Original Architecture Core CPU
q Low Current Consumption
q Wide-range Operating Voltage (0.9V to 3.6V)
q High Speed Operation in Low Voltage
q A/D Converter