- 您現在的位置：買賣IC網 > PDF目錄192295 > S25FL004D0LMAI011 (SPANSION LLC) 4 Megabit CMOS 3.0 Volt Flash Memory with 50 Mhz SPI Bus Interface PDF資料下載
參數資料
| 型號： | S25FL004D0LMAI011 |
| 廠商： | SPANSION LLC |
| 元件分類： | PROM |
| 英文描述： | 4 Megabit CMOS 3.0 Volt Flash Memory with 50 Mhz SPI Bus Interface |
| 中文描述： | 4M X 1 FLASH 3V PROM, PDSO8 |
| 封裝： | 0.208 INCH, SOP-8 |
| 文件頁數： | 14/36頁 |
| 文件大小： | 724K |
| 代理商： | S25FL004D0LMAI011 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁當前第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁
June 28, 2004 S25FL004D_00A0
S25FL Family (Serial Peripheral Interface) S25FL004D
21
Ad va nc e
In forma t i o n
and is 0 when it is completed. At some unspecified time before the cycle is com-
pleted, the Write Enable Latch (WEL) bit is reset.
A Sector Erase (SE) instruction applied to any memory area that is protected by
the Block Protect (BP2, BP1, BP0) bits (see Table 1) is not executed.
Figure 12. Sector Erase (SE) Instruction Sequence
Bulk Erase (BE)
The Bulk Erase (BE) instruction sets to 1 (FFh) all bits inside the entire memory.
Before it can be accepted, a Write Enable (WREN) instruction must previously
have been executed. After the Write Enable (WREN) instruction has been de-
coded, the device sets the Write Enable Latch (WEL).
The Bulk Erase (BE) instruction is entered by driving Chip Select (CS#) Low, fol-
lowed by the instruction code, on Serial Data Input (SI). No address is required
for the Bulk Erase (BE) instruction. Chip Select (CS#) must be driven Low for the
entire duration of the sequence.
The instruction sequence is shown in Figure 13.
Chip Select (CS#) must be driven High after the eighth bit of the last address byte
has been latched in, otherwise the Bulk Erase (BE) instruction is not executed.
As soon as Chip Select (CS#) is driven High, the self-timed Bulk Erase cycle
(whose duration is tBE) is initiated. While the Bulk Erase cycle is in progress, the
Status Register may be read to check the value of the Write In Progress (WIP)
bit. The Write In Progress (WIP) bit is 1 during the self-timed Bulk Erase cycle,
and is 0 when it is completed. At some unspecified time before the cycle is com-
pleted, the Write Enable Latch (WEL) bit is reset.
A Bulk Erase (BE) instruction is executed only if all the Block Protect (BP2, BP1,
BP0) bits (see Table 1) are set to 0. The Bulk Erase (BE) instruction is ignored if
one or more sectors are protected.
CS#
SCK
SI
Instruction
24 Bit Address
01
2
3
4
5
6
7
8
9
10
28 29 30 31
23 22 21
3
2
1
0
MSB
相關PDF資料 |
PDF描述 |
|---|---|
| S25FL004D0LMAI013 | 4 Megabit CMOS 3.0 Volt Flash Memory with 50 Mhz SPI Bus Interface |
| S25FL004D0LMFI011 | 4 Megabit CMOS 3.0 Volt Flash Memory with 50 Mhz SPI Bus Interface |
| S25FL004D0LMFI013 | 4 Megabit CMOS 3.0 Volt Flash Memory with 50 Mhz SPI Bus Interface |
| S25FL004D0LNFI011 | 4 Megabit CMOS 3.0 Volt Flash Memory with 50 Mhz SPI Bus Interface |
| S25FL004D0LNFI013 | 4 Megabit CMOS 3.0 Volt Flash Memory with 50 Mhz SPI Bus Interface |
相關代理商/技術參數 |
參數描述 |
|---|---|
| S25FL004D0LMAI013 | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:4 Megabit CMOS 3.0 Volt Flash Memory with 50 Mhz SPI Bus Interface |
| S25FL004D0LMFI011 | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:4 Megabit CMOS 3.0 Volt Flash Memory with 50 Mhz SPI Bus Interface |
| S25FL004D0LMFI013 | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:4 Megabit CMOS 3.0 Volt Flash Memory with 50 Mhz SPI Bus Interface |
| S25FL004D0LNAI011 | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:4 Megabit CMOS 3.0 Volt Flash Memory with 50 Mhz SPI Bus Interface |
| S25FL004D0LNAI013 | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:4 Megabit CMOS 3.0 Volt Flash Memory with 50 Mhz SPI Bus Interface |
發布緊急采購，3分鐘左右您將得到回復。