欧美成人免费电影,国产欧美一区二区三区精品酒店,精品国产a毛片,色网在线免费观看

參數(shù)資料
型號: S25FL004D0LMAI011
廠商: SPANSION LLC
元件分類: PROM
英文描述: 4 Megabit CMOS 3.0 Volt Flash Memory with 50 Mhz SPI Bus Interface
中文描述: 4M X 1 FLASH 3V PROM, PDSO8
封裝: 0.208 INCH, SOP-8
文件頁數(shù): 9/36頁
文件大小: 724K
代理商: S25FL004D0LMAI011
June 28, 2004 S25FL004D_00A0
S25FL Family (Serial Peripheral Interface) S25FL004D
17
Ad va nc e
In forma t i o n
Figure 8. Write Status Register (WRSR) Instruction Sequence
Table 4. Protection Modes
5. As defined by the values in the Block Protect (BP2, BP1, BP0) bits of the Status Register, as shown in Table 1.
The protection features of the device are summarized in Table 4.
When the Status Register Write Disable (SRWD) bit of the Status Register is 0 (its
initial delivery state), it is possible to write to the Status Register provided that
the Write Enable Latch (WEL) bit has previously been set by a Write Enable
(WREN) instruction, regardless of the whether Write Protect (W#) is driven High
or Low.
When the Status Register Write Disable (SRWD) bit of the Status Register is set
to 1, two cases need to be considered, depending on the state of Write Protect
(W#):
If Write Protect (W#) is driven High, it is possible to write to the Status Reg-
ister provided that the Write Enable Latch (WEL) bit has previously been set
by a Write Enable (WREN) instruction.
If Write Protect (W#) is driven Low, it is not possible to write to the Status
Register even if the Write Enable Latch (WEL) bit has previously been set by
a Write Enable (WREN) instruction. (Attempts to write to the Status Register
are rejected, and are not accepted for execution). As a consequence, all the
data bytes in the memory area that are software protected (SPM) by the
Block Protect (BP2, BP1, BP0) bits of the Status Register, are also hardware
protected against data modification.
Regardless of the order of the two events, the Hardware Protected Mode (HPM)
can be entered:
by setting the Status Register Write Disable (SRWD) bit after driving Write
Protect (W#) Low
W# Signal SRWD Bit
Mode
Write Protection of the Status
Register
Protected Area
(Note 1)
Unprotected Area
(Note 1)
1
Software
Protected
(SPM)
Status Register is Writeable (if the
WREN instruction has set the WEL
bit)
The values in the SRWD, BP2, BP1
and BP0 bits can be changed
Protected against Page
Program and Erase
(SE, BE)
Ready to accept Page
Program and Sector
Erase Instructions
1
0
1
Hardware
Protected
(HPM)
Status Register is Hardware write
protected
The values in the SRWD, BP2, BP1
and BP0 bits cannot be changed
Protected against Page
Program and Erase
(SE, BE)
Ready to accept Page
Program and Sector
Erase Instructions
High Impedance
MSB
Instruction
Status
Register In
CS#
SCK
SI
SO
0 12 3 4 5 6 7 8 9 10 11 12 13 14 15
相關(guān)PDF資料
PDF描述
S25FL004D0LMAI013 4 Megabit CMOS 3.0 Volt Flash Memory with 50 Mhz SPI Bus Interface
S25FL004D0LMFI011 4 Megabit CMOS 3.0 Volt Flash Memory with 50 Mhz SPI Bus Interface
S25FL004D0LMFI013 4 Megabit CMOS 3.0 Volt Flash Memory with 50 Mhz SPI Bus Interface
S25FL004D0LNFI011 4 Megabit CMOS 3.0 Volt Flash Memory with 50 Mhz SPI Bus Interface
S25FL004D0LNFI013 4 Megabit CMOS 3.0 Volt Flash Memory with 50 Mhz SPI Bus Interface
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
S25FL004D0LMAI013 制造商:SPANSION 制造商全稱:SPANSION 功能描述:4 Megabit CMOS 3.0 Volt Flash Memory with 50 Mhz SPI Bus Interface
S25FL004D0LMFI011 制造商:SPANSION 制造商全稱:SPANSION 功能描述:4 Megabit CMOS 3.0 Volt Flash Memory with 50 Mhz SPI Bus Interface
S25FL004D0LMFI013 制造商:SPANSION 制造商全稱:SPANSION 功能描述:4 Megabit CMOS 3.0 Volt Flash Memory with 50 Mhz SPI Bus Interface
S25FL004D0LNAI011 制造商:SPANSION 制造商全稱:SPANSION 功能描述:4 Megabit CMOS 3.0 Volt Flash Memory with 50 Mhz SPI Bus Interface
S25FL004D0LNAI013 制造商:SPANSION 制造商全稱:SPANSION 功能描述:4 Megabit CMOS 3.0 Volt Flash Memory with 50 Mhz SPI Bus Interface
主站蜘蛛池模板: 卓资县| 宝山区| 伊川县| 金川县| 赣榆县| 淅川县| 麻阳| 丰台区| 闸北区| 沧州市| 乌鲁木齐市| 河东区| 玉溪市| 资溪县| 谢通门县| 莱阳市| 扶风县| 霍林郭勒市| 马边| 上犹县| 凭祥市| 娱乐| 罗源县| 镇远县| 娄烦县| 蓬莱市| 宕昌县| 昆山市| 清远市| 格尔木市| 天津市| 平阴县| 怀仁县| 乌鲁木齐县| 柞水县| 蚌埠市| 高淳县| 天峻县| 福州市| 沙田区| 夏津县|