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參數資料
型號: S29CD032J1JFFN020
廠商: SPANSION LLC
元件分類: PROM
英文描述: 1M X 32 FLASH 2.7V PROM, 54 ns, PBGA80
封裝: 13 X 11 MM, 1 MM PITCH, LEAD FREE, FORTIFIED, BGA-80
文件頁數: 63/78頁
文件大小: 1825K
代理商: S29CD032J1JFFN020
64
S29CD-J & S29CL-J Flash Family
S29CD-J_CL-J_00_B1 September27,2006
Prel imi n ary
Note: VA = Valid address. Illustration shows first status cycle after command sequence, last status read cycle, and array
data read cycle.
Figure 18.11 Data# Polling Timings (During Embedded Algorithms)
Note: VA = Valid address; not required for DQ6. Illustration shows first two status cycle after command sequence, last sta-
tus read cycle, and array data read cycle.
Figure 18.12 Toggle Bit Timings (During Embedded Algorithms)
Note: The system may use CE# or OE# to toggle DQ2 and DQ6. DQ2 toggles only when read at an address within an
erase-suspended sector.
Figure 18.13 DQ2 vs. DQ6 for Erase/Erase Suspend Operations
WE#
CE#
OE#
High Z
tOE
High Z
DQ7
Data
RY/BY#
tBUSY
Complement
True
Addresses
VA
tOEH
tCE
tCH
tOH
tDF
VA
Status Data
Complement
Status Data
True
Valid Data
tACC
tRC
tWC
WE#
CE#
OE#
High Z
tOE
DQ6/DQ2
RY/BY#
tBUSY
Addresses
VA
tOEH
tCE
tCH
tOH
tDF
VA
tACC
tRC
Valid Data
Valid Status
(first read)
(second read)
(stops toggling)
Valid Status
VA
WE#
DQ6
DQ2
Enter Embedded
Erasing
Erase
Suspend
Enter Erase
Suspend Program
Erase
Resume
Erase
Erase Suspend
Read
Erase Suspend
Program
Erase Suspend
Read
Erase
Complete
相關PDF資料
PDF描述
S29CL032J0RFAI113 1M X 32 FLASH 3.3V PROM, 48 ns, PBGA80
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S29CL032J0RFFN130 1M X 32 FLASH 3.3V PROM, 48 ns, PBGA80
S29CL032J1JFAI110 1M X 32 FLASH 3.3V PROM, 54 ns, PBGA80
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