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參數(shù)資料
| 型號： | S29GL032A90TAIR23 |
| 廠商： | SPANSION LLC |
| 元件分類： | PROM |
| 英文描述： | 64 MEGABIT 32MEGABIT 3.0 BOLT ONLY PAGE MODE FLASH MEMORY |
| 中文描述： | 2M X 16 FLASH 3V PROM, 90 ns, PDSO56 |
| 封裝： | MO-142EC, TSOP-56 |
| 文件頁數(shù)： | 54/95頁 |
| 文件大小： | 3585K |
| 代理商： | S29GL032A90TAIR23 |
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58
S29GL-A
S29GL-A_00_A12 May 21, 2008
Da ta
Sh e e t
Figure 9.3 Program Suspend/Program Resume
9.6
Chip Erase Command Sequence
Chip erase is a six bus cycle operation. The chip erase command sequence is initiated by writing two unlock
cycles, followed by a set-up command. Two additional unlock write cycles are then followed by the chip erase
command, which in turn invokes the Embedded Erase algorithm. The device does not require the system to
preprogram prior to erase. The Embedded Erase algorithm automatically preprograms and verifies the entire
memory for an all zero data pattern prior to electrical erase. The system is not required to provide any
controls or timings during these operations. Table 10.2 on page 61 and Table 10.1 on page 62 show the
address and data requirements for the chip erase command sequence.
When the Embedded Erase algorithm is complete, the device returns to the read mode and addresses are no
longer latched. The system can determine the status of the erase operation by using DQ7, DQ6, or DQ2.
Refer to Write Operation Status on page 63 for information on these status bits.
Any commands written during the chip erase operation are ignored. However, note that a hardware reset
immediately terminates the erase operation. If this occurs, the chip erase command sequence should be
reinitiated once the device returns to reading array data, to ensure data integrity.
Figure 10.1 on page 59 illustrates the algorithm for the erase operation. Refer to Table 16.5 on page 76 for
parameters, and Figure 16.7 on page 80 for timing diagrams.
Program Operation
or Write-to-Buffer
Sequence in Progress
Write Program Suspend
Command Sequence
Command is also valid for
Erase-suspended-program
operations
Autoselect and SecSi Sector
read operations are also allowed
Data cannot be read from erase- or
program-suspended sectors
Write Program Resume
Command Sequence
Read data as
required
Done
reading?
No
Yes
Write address/data
XXXh/30h
Device reverts to
operation prior to
Program Suspend
Write address/data
XXXh/B0h
Wait 15
μs
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| S29GL032M10BFIR20 | T528 Series - I, M, Z Case Sizes - Face Down Termination Tantalum Surface Mount Capacitor; Capacitance [nom]: 220uF; Working Voltage (Vdc)[max]: 4V; Capacitance Tolerance: +/-20%; Dielectric: Tantalum, Solid; ESR: 9.0mΩ; Lead Style: Surface-Mount Chip; Lead Dimensions: 7343-17; Termination: 100% Tin (Sn); Body Dimensions: 7.3mm x 4.3mm x 1.7mm; Temperature Range: -55C to +105C; Container: Tape & Reel; Qty per Container: 1,000; Features: Face Down Termination |
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| S29GL032A90TAIR30 | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:64 MEGABIT 32MEGABIT 3.0 BOLT ONLY PAGE MODE FLASH MEMORY |
| S29GL032A90TAIR31 | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:64 MEGABIT 32MEGABIT 3.0 BOLT ONLY PAGE MODE FLASH MEMORY |
| S29GL032A90TAIR32 | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:64 MEGABIT 32MEGABIT 3.0 BOLT ONLY PAGE MODE FLASH MEMORY |
| S29GL032A90TAIR33 | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:64 MEGABIT 32MEGABIT 3.0 BOLT ONLY PAGE MODE FLASH MEMORY |
| S29GL032A90TAIR40 | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:64 MEGABIT 32MEGABIT 3.0 BOLT ONLY PAGE MODE FLASH MEMORY |
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