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參數資料
型號: SCANPSC110F
廠商: National Semiconductor Corporation
英文描述: SCAN Bridge Hierarchical and Multidrop Addressable JTAG Port(掃描橋分層多點可設定地址的JTAG端口)
中文描述: 掃描橋層次和多點尋址JTAG端口(掃描橋分層多點可設定地址的的JTAG端口)
文件頁數: 1/29頁
文件大小: 459K
代理商: SCANPSC110F
SCANPSC110F
SCAN Bridge Hierarchical and Multidrop Addressable
JTAG Port (IEEE1149.1 System Test Support)
General Description
The SCANPSC110F Bridge extends the IEEE Std. 1149.1
test bus into a multidrop test bus environment. The advan-
tage of a hierarchical approach over a single serial scan
chain is improved test throughput and the ability to remove a
board from the system and retain test access to the remain-
ing modules. Each SCANPSC110F Bridge supports up to 3
local scan rings which can be accessed individually or com-
bined serially. Addressing is accomplished by loading the in-
struction register with a value matching that of the Slot in-
puts. Backplane and inter-board testing can easily be
accomplished by parking the local TAP Controllers in one of
the stable TAP Controller states via a Park instruction. The
32-bit TCK counter enables built in self test operations to be
performed on one port while other scan chains are simulta-
neously tested.
Features
n
True IEEE1149.1 hierarchical and multidrop addressable
capability
n
The 6 slot inputs support up to 59 unique addresses, a
Broadcast Address, and 4 Multi-cast Group Addresses
n
3 IEEE 1149.1-compatible configurable local scan ports
n
Mode Register allows local TAPs to be bypassed,
selected for insertion into the scan chain individually, or
serially in groups of two or three
n
32-bit TCK counter
n
16-bit LFSR Signature Compactor
n
Local TAPs can be tri-stated via the OE input to allow
an alternate test master to take control of the local TAPs
n
The IP version of this device supports features not
described in this datasheet such as 8 slot inputs for
enhanced address capability and additional instructions.
For a completed description of the additional instructions
supported, refer to the SCANPSC110 supplemental
datasheet.
Connection Diagrams
TRI-STATE
is a registered trademark of National Semiconductor Corporation.
28-Pin
CDIP and Flatpak
DS100327-1
Pin Assignment for LCC
DS100327-2
October 1999
S
1999 National Semiconductor Corporation
DS100327
www.national.com
相關PDF資料
PDF描述
SCANPSC110 SCAN Bridge Hierarchical and Multidrop Addressable JTAG Port (IEEE1149.1 System Test Support)
SCANPSC110FDMQB SCAN Bridge Hierarchical and Multidrop Addressable JTAG Port (IEEE1149.1 System Test Support)
SCANPSC110FFMQB SCAN Bridge Hierarchical and Multidrop Addressable JTAG Port (IEEE1149.1 System Test Support)
SCANPSC110FLMQB SCAN Bridge Hierarchical and Multidrop Addressable JTAG Port (IEEE1149.1 System Test Support)
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相關代理商/技術參數
參數描述
SCANPSC110FDMQB 制造商:NSC 制造商全稱:National Semiconductor 功能描述:SCAN Bridge Hierarchical and Multidrop Addressable JTAG Port (IEEE1149.1 System Test Support)
SCANPSC110FDMQB WAF 制造商:Texas Instruments 功能描述:
SCANPSC110FDMQB WAF 制造商:Texas Instruments 功能描述:
SCANPSC110FFMQB 制造商:NSC 制造商全稱:National Semiconductor 功能描述:SCAN Bridge Hierarchical and Multidrop Addressable JTAG Port (IEEE1149.1 System Test Support)
SCANPSC110FLMQB 功能描述:IC BRIDGE LCC SCAN MUL JTAG PORT RoHS:否 類別:集成電路 (IC) >> 接口 - 專用 系列:* 標準包裝:3,000 系列:- 應用:PDA,便攜式音頻/視頻,智能電話 接口:I²C,2 線串口 電源電壓:1.65 V ~ 3.6 V 封裝/外殼:24-WQFN 裸露焊盤 供應商設備封裝:24-QFN 裸露焊盤(4x4) 包裝:帶卷 (TR) 安裝類型:表面貼裝 產品目錄頁面:1015 (CN2011-ZH PDF) 其它名稱:296-25223-2
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