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參數資料
| 型號： | SE95D,112 |
| 廠商： | NXP Semiconductors |
| 文件頁數： | 12/27頁 |
| 文件大小： | 150K |
| 描述： | IC SENSOR TEMP 2.8-5.5V SOT96-1 |
| 標準包裝： | 100 |
| 功能： | 溫度監視系統（傳感器），監視器 |
| 傳感器類型： | 內部 |
| 感應溫度： | -55°C ~ 125°C |
| 精確度： | ±3°C（最小值） |
| 拓撲： | ADC（三角積分型），比較器，振蕩器，寄存器庫 |
| 輸出類型： | 2 線串行，I²C? |
| 輸出警報： | 無 |
| 輸出風扇： | 是 |
| 電源電壓： | 2.8 V ~ 5.5 V |
| 工作溫度： | -55°C ~ 125°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 8-SOIC（0.154"，3.90mm 寬） |
| 供應商設備封裝： | 8-SO |
| 包裝： | 管件 |
| 其它名稱： | 935274141112 SE95D SE95D-ND |
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SE95_7
?NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 07 2 September 2009
12 of 27
NXP Semiconductors
SE95
Ultra high accuracy digital temperature sensor and thermal watchdog
8.7 Protocols for writing and reading the registers
The communication between the host and the SE95 must follow the rules strictly as
dened by the I
2
C-bus management. The protocols for SE95 register read/write
operations are illustrated in
Figure
5 to
Figure
10 together with the following denitions:
1. Before a communication, the I
2
C-bus must be free or not busy. It means that the SCL
and SDA lines must both be released by all devices on the bus, and they become
HIGH by the bus pull-up resistors.
2. The host must provide SCL clock pulses necessary for the communication. Data is
transferred in a sequence of 9 SCL clock pulses for every 8-bit data byte followed by
1-bit status of the acknowledgement.
3. During data transfer, except the START and STOP signals, the SDA signal must be
stable while the SCL signal is HIGH. It means that the SDA signal can be changed
only during the LOW duration of the SCL line.
4. S: START signal, initiated by the host to start a communication, the SDA goes from
HIGH-to-LOW while the SCL is HIGH.
5. RS: RE-START signal, same as the START signal, to start a read command that
follows a write command.
6. P: STOP signal, generated by the host to stop a communication, the SDA goes from
LOW-to-HIGH while the SCL is HIGH. The bus becomes free thereafter.
7. W: write bit, when the write/read bit is in a write command.
8. R: read bit, when the write/read bit is logic 1 in a read command.
9. A: device acknowledge bit, returned by the SE95. It is logic 0 if the device works
properly and logic 1 if not. The host must release the SDA line during this period in
order to give the device the control on the SDA line.
10. A: master acknowledge bit, not returned by the device, but set by the master or host
in reading 2-byte data. During this clock period, the host must set the SDA line to
LOW in order to notify the device that the rst byte has been read for the device to
provide the second byte onto the bus.
11. NA: not-acknowledge bit. During this clock period, both the device and host release
the SDA line at the end of a data transfer, the host is then enabled to generate the
stop signal.
12. In a write protocol, data is sent from the host to the device and the host controls the
SDA line, except during the clock period when the device sends the device
acknowledgement signal to the bus.
13. In a read protocol, data is sent to the bus by the device and the host must release the
SDA line during the time that the device is providing data onto the bus and controlling
the SDA line, except during the clock period when the master sends the master
acknowledgement signal to the bus.
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