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參數資料
| 型號： | SE95D,112 |
| 廠商： | NXP Semiconductors |
| 文件頁數： | 5/27頁 |
| 文件大小： | 150K |
| 描述： | IC SENSOR TEMP 2.8-5.5V SOT96-1 |
| 標準包裝： | 100 |
| 功能： | 溫度監視系統（傳感器），監視器 |
| 傳感器類型： | 內部 |
| 感應溫度： | -55°C ~ 125°C |
| 精確度： | ±3°C（最小值） |
| 拓撲： | ADC（三角積分型），比較器，振蕩器，寄存器庫 |
| 輸出類型： | 2 線串行，I²C? |
| 輸出警報： | 無 |
| 輸出風扇： | 是 |
| 電源電壓： | 2.8 V ~ 5.5 V |
| 工作溫度： | -55°C ~ 125°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 8-SOIC（0.154"，3.90mm 寬） |
| 供應商設備封裝： | 8-SO |
| 包裝： | 管件 |
| 其它名稱： | 935274141112 SE95D SE95D-ND |
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SE95_7
?NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 07 2 September 2009
5 of 27
NXP Semiconductors
SE95
Ultra high accuracy digital temperature sensor and thermal watchdog
In OS interrupt mode, the OS output is used for thermal interruption. When the device is
powered-up, the OS output is rst activated only when Temp exceeds T
os
; then it remains
active indenitely until being reset by a read of any register. Once the OS output has been
activated by crossing T
os
and then reset, it can be activated again only when Temp drops
below T
hyst
; then again, it remains active indenitely until being reset by a read of any
register. The OS interrupt operation would be continued in this sequence: T
os
trip, reset,
T
hyst
trip, reset, T
os
trip, reset, T
hyst
trip, reset, and etc. Putting the device into shutdown
mode also resets the OS output.
In both cases, comparator mode and interrupt mode, the OS output is activated only if a
number of consecutive faults, dened by the device fault queue, has been met. The fault
queue is programmable and stored in bits OS_F_QUE[1:0], of register Conf. Also, the OS
output active state is selectable as HIGH or LOW by setting accordingly the bit OS_POL
of register Conf.
At power-up, the device is put into normal operation mode, register Tos is set to 80 癈,
register Thyst is set to 75 癈, OS active state is selected LOW and the fault queue is equal
to 1. The data reading of register Temp is not available until the rst conversion is
completed in about 33 ms.
The OS response to the temperature is illustrated in
Figure
4.
(1) OS is reset by either reading register or putting the device in shutdown mode. Assumed that the
fault queue is met at each T
os
and T
hyst
crossing point.
Fig 4. OS response to temperature
001aad623
(1)
(1)
(1)
T
os
T
hyst
OS RESET
OS ACTIVE
OS RESET
OS ACTIVE
OS output in comparator mode
OS output in interrupt mode
reading temperature limits
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