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參數資料
型號: SIC417CD-T1-E3
廠商: Vishay Siliconix
文件頁數: 13/19頁
文件大?。?/td> 922K
描述: IC REG DL BCK/LINEAR SYNC 32MLPQ
標準包裝: 1
系列: microBUCK®
拓撲: 降壓(降壓)同步(1),線性(LDO)(1)
功能: 任何功能
輸出數: 2
頻率 - 開關: 200kHz ~ 1MHz
電壓/電流 - 輸出 1: 0.5 V ~ 5.5 V,10A
電壓/電流 - 輸出 2: 0.75 V ~ 5.25 V,150mA
帶 LED 驅動器:
帶監控器:
帶序列發生器:
電源電壓: 3 V ~ 28 V
工作溫度: -25°C ~ 125°C
安裝類型: 表面貼裝
封裝/外殼: 32-PowerWFQFN
供應商設備封裝: PowerPAK? MLP55-32
包裝: 標準包裝
其它名稱: SIC417CD-T1-E3DKR
Vishay Siliconix
SiC417
Document Number: 69062
S10-1367-Rev. D, 14-Jun-10
www.vishay.com
13
Frequency Selection
Selection of the switching frequency requires making a
trade-off between the size and cost of the external filter
components (inductor and output capacitor) and the power
conversion efficiency.
The desired switching frequency is 250 kHz which results
from using component selected for optimum size and cost.
A resistor (R
TON
) is used to program the on-time (indirectly
setting the frequency) using the following equation.
To select R
TON
, use the maximum value for V
IN
, and for t
ON
use the value associated with maximum V
IN
.
t
ON
 = 318 ns at 13.2 V
IN
, 1.05 V
OUT
, 250 kHz
Substituting for R
TON
 results in the following solution
R
TON
 = 154.9 k? use R
TON
 = 154 k?
Inductor Selection
In order to determine the inductance, the ripple current must
first be defined. Low inductor values result in smaller size but
create higher ripple current which can reduce efficiency.
Higher inductor values will reduce the ripple current and
voltage and for a given DC resistance are more efficient.
However, larger inductance translates directly into larger
packages and higher cost. Cost, size, output ripple, and
efficiency are all used in the selection process.
The ripple current will also set the boundary for power-save
operation. The switching will typically enter power-save
mode when the load current decreases to 1/2 of the ripple
current. For example, if ripple current is 4 A then power-save
operation will typically start for loads less than 2 A. If ripple
current is set at 40 % of maximum load current, then power-
save will start for loads less than 20 % of maximum current.
The inductor value is typically selected to provide a ripple
current that is between 25 % to 50 % of the maximum load
current. This provides an optimal trade-off between cost,
efficiency, and transient performance.
During the DH on-time, voltage across the inductor is
(V
IN
-V
OUT
). The equation for determining inductance is
shown next.
Example
In this example, the inductor ripple current is set equal to
50 % of the maximum load current. Thus ripple current will be
50 % x 10 A or 5 A. To find the minimum inductance needed,
use the V
IN
 and T
ON
 values that correspond to V
INMAX.
A slightly larger value of 0.88 礖 is selected. This will
decrease the maximum I
RIPPLE
 to 4.4 A.
Note that the inductor must be rated for the maximum DC
load current plus 1/2 of the ripple current. The ripple current
under minimum V
IN
 conditions is also checked using the
following equations.
Capacitor Selection
The output capacitors are chosen based on required ESR
and capacitance. The maximum ESR requirement is
controlled by the output ripple requirement and the DC
tolerance. The output voltage has a DC value that is equal to
the valley of the output ripple plus 1/2 of the peak-to-peak
ripple. Change in the output ripple voltage will lead to a
change in DC voltage at the output.
The design goal is that the output voltage regulation be
?4 % under static conditions. The internal 500 mV reference
tolerance is 1 %. Allowing 1 % tolerance from the FB resistor
divider, this allows 2 % tolerance due to V
OUT
 ripple.
Since this 2 % error comes from 1/2 of the ripple voltage, the
allowable ripple is 4 %, or 42 mV for a 1.05 V output.
The maximum ripple current of 4.4 A creates a ripple voltage
across the ESR. The maximum ESR value allowed is shown
by the following equations.
The output capacitance is usually chosen to meet transient
requirements. A worst-case load release, from maximum
load to no load at the exact moment when inductor current is
at the peak, determines the required capacitance. If the load
release is instantaneous (load changes from maximum to
zero in < 1 祍), the output capacitor must absorb all the
inductor's stored energy. This will cause a peak voltage on
the capacitor according to the following equation.
Assuming a peak voltage V
PEAK
 of 1.150 (100 mV rise upon
load release), and a 10 A load release, the required
capacitance is shown by the next equation.
If the load release is relatively slow, the output capacitance
can be reduced. At heavy loads during normal switching,
when the FB pin is above the 500 mV reference, the DL
R
ton
 =
(t
ON
 - 10 ns) x V
IN
25 pF x V
OUT
t
ON
 =
V
OUT
V
INMAX.
 x f
SW
L =
(V
IN
- V
OUT
) x t
ON
I
RIPPLE
L =
(13.2 - 1.05) x 318 ns
5 A
= 77 礖
T
ON_VINMIN
 =
25 pF x R
TON
 x V
OUT
V
INMIN
I
RIPPLE
 =
(V
IN
 - V
OUT
) x T
ON
L
I
RIPPLE_VIN
 =
(10.8 - 1.05) x 384 ns
0.88 礖
= 4.25 A
ESR
MAX
 =
V
RIPPLE
I
RIPPLEMAX
ESR
MAX
 = 9.5 m?/SPAN>
=
42 mV
4.4 A
COUT
MIN
 =
L (I
OUT
 + x I
RIPPLEMAX
)
2
(V
PEAK
)
2
- (V
OUT
)
2
1
2
COUT
MIN
 =
0.88 礖 (10 + x 4.4)
2
(1.15)
2
- (1.05)
2
COUT
MIN
 = 595 ?/SPAN>F
1
2
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