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參數資料
| 型號： | SL23EP04SI-2HT |
| 廠商： | SILICON LABORATORIES |
| 元件分類： | 時鐘及定時 |
| 英文描述： | 23EP SERIES, PLL BASED CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO8 |
| 封裝： | 0.150 INCH, ROHS COMPLIANT, SOIC-8 |
| 文件頁數： | 1/15頁 |
| 文件大小： | 229K |
| 代理商： | SL23EP04SI-2HT |
Rev 2.1, May 15, 2008
Page 1 of 15
2400 West Cesar Chavez, Austin, TX 78701
1+(512) 416-8500
1+(512) 416-9669
www.silabs.com
SL23EP04
Key Features
10 to 220 MHz operating frequency range
Low output clock skew: 60ps-typ
Low output clock Jitter:
Low part-to-part output skew: 150 ps-typ
3.3V to 2.5V power supply range
Low power dissipation:
- 12 mA-typ at 66MHz and VDD=3.3V
- 10 mA-typ at 66MHz and VDD=2.5V
One input drives 4 outputs
Multiple configurations and drive options
SpreadThru PLL that allows use of SSCG
Available in 8-pin SOIC package
Available in Commercial and Industrial grades
Applications
Printers, MFPs and Digital Copiers
PCs and Work Stations
Routers, Switchers and Servers
Datacom and Telecom
High-Speed Digital Embeded Systems
Description
The SL23EP04 is a low skew, low jitter and low power
Zero Delay Buffer (ZDB) designed to produce up to four
(4) clock outputs from one (1) reference input clock, for
high speed clock distribution applications.
The product has an on-chip PLL and a feedback pin
(FBK) which can be used to obtain feedback from any
one of the 4 output clocks. The SL23EP04 offers X/2,1X
and 2X frequency options at the output with respect to
input reference clock. Refer to the “Product Configuration
Table” for the details of these options.
The SL23EP04-1H and -2H High Drive version operates
up to 220 MHz and 200MHz at 3.3 and 2.5V power
supplies respectively. The standard versions -1 and -2
operate up to 167MHz and 135MHz at 3.3V and 2.5V
power supplies respectively with CL=15pF output load.
The SL23EP04 enter into Power Down (PD) mode if the
input at CLKIN is DC (GND to VDD). In this state all 4
output clocks are tri-stated and the PLL is turned off,
leading to 8
μA-typ power supply current draw.
Benefits
Up to four (4) distribution of input clock
Standard and High-Drive levels to control
impedance level, frequency range and EMI
Low skew, jitter and power dissipation
Block Diagram
Low Power and
Low Jitter
PLL
VDD
GND
CLKIN
FBK
CLKA1
CLKA2
CLKB1
CLKB2
/2
(Divider for -2 only)
Low Jitter and Skew 10 to 220 MHz Zero Delay Buffer (ZDB)
相關PDF資料 |
PDF描述 |
|---|---|
| SL23EP04SC-2HT | 23EP SERIES, PLL BASED CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO8 |
| SL23EP04SC-2 | 23EP SERIES, PLL BASED CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO8 |
| SL23EP04SI-2 | 23EP SERIES, PLL BASED CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO8 |
| SL23EP04SC-1T | 23EP SERIES, PLL BASED CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO8 |
| SL23EP05IT-1 | 23EP SERIES, PLL BASED CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO8 |
相關代理商/技術參數 |
參數描述 |
|---|---|
| SL23EP04SI-2T | 功能描述:時鐘緩沖器 10-220MHz 4 Outputs ZDB 3.3-2.5V RoHS:否 制造商:Texas Instruments 輸出端數量:5 最大輸入頻率:40 MHz 傳播延遲（最大值）: 電源電壓-最大:3.45 V 電源電壓-最小:2.375 V 最大功率耗散: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LLP-24 封裝:Reel |
| SL23EP05 | 制造商:SPECTRALINEAR 制造商全稱:SPECTRALINEAR 功能描述:Low Jitter and Skew 10 to 220MHz Zero Delay Buffer (ZDB) |
| SL23EP05SC-1 | 功能描述:時鐘緩沖器 10-220MHz 5 Outputs ZDB 3.3-2.5V RoHS:否 制造商:Texas Instruments 輸出端數量:5 最大輸入頻率:40 MHz 傳播延遲（最大值）: 電源電壓-最大:3.45 V 電源電壓-最小:2.375 V 最大功率耗散: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LLP-24 封裝:Reel |
| SL23EP05SC-1H | 功能描述:時鐘緩沖器 10-220MHz 5 Outputs ZDB 3.3-2.5V Hi Drv RoHS:否 制造商:Texas Instruments 輸出端數量:5 最大輸入頻率:40 MHz 傳播延遲（最大值）: 電源電壓-最大:3.45 V 電源電壓-最小:2.375 V 最大功率耗散: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LLP-24 封裝:Reel |
| SL23EP05SC-1HT | 功能描述:時鐘緩沖器 10-220MHz 5 Outputs ZDB 3.3-2.5V Hi Drv RoHS:否 制造商:Texas Instruments 輸出端數量:5 最大輸入頻率:40 MHz 傳播延遲（最大值）: 電源電壓-最大:3.45 V 電源電壓-最小:2.375 V 最大功率耗散: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LLP-24 封裝:Reel |
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