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參數(shù)資料
| 型號(hào)： | SLO2016 |
| 廠商： | SIEMENS A G |
| 元件分類： | 顯示用LED |
| 英文描述： | 5X7 DOT MATRIX DISPLAY, HIGH EFFICIENCY RED, 4.72 mm |
| 文件頁(yè)數(shù)： | 3/5頁(yè) |
| 文件大小： | 203K |
| 代理商： | SLO2016 |
2–214
SLR/SLO/SLG/SLY2016
AC Characteristics Guaranteed Minimum Timing
Parameters at VCC=5.0 V ±0.5 V
Note: TACC=Set Up Time + Write Time + Hold Time
Loading Data
The desired data code (D0–D6) and digit address (A0, A1)
must be held stable during the write cycle for storing new
data.
Data entry may be asynchronous. Digit 0 is dened as right
hand digit with A1=A2=0.`
Clearing the entire internal four-digit memory can be accom-
plished by holding the clear (CLR) low for 1 msec minimum.
The clear function will clear the ASCII RAM. Loading an ille-
gal data code will display a blank.
Typical Loading State Table
Figure 3. Flashing circuit using a 555
Parameter
Symbol
–40
°C +25°C +85°C Unit
Address Set
Up Time
TAS
10
ns
Write Time
TW
60
70
90
ns
Data Set Up
Time
TDS
20
30
50
ns
Address Hold
Time
TAH
20
30
40
ns
Data Hold Time
TDH
20
30
40
ns
Access Time
TACC(1)
90
110
140
ns
Clear Disable
Time
TCLRD
111
s
Clear Time
TCLR
111ms
WR
A1 A0 D6 D5 D4 D3 D2 D1 D0
Digit
3210
H
previously loaded display
G
R
E
Y
L
LLH
LLLH
LH
G
R
E
L
HHL
HL
HG
R
U
E
L
H
LH
LLH
H
LLG
L
U
E
L
H
LLLLH
LB
L
U
E
L
H
LLLH
LH
B
L
E
L
H
L
H
L
HHHB
LE
W
L
X
see character code
see char. set
555
Timer
R1
4.7 K
R2
100 K
C4
0.01
F
C3
10
F
VCC=5.0 V
To BL
Pin on
Display
1
2
3
4
8
7
6
5
Figure 3a. Flashing (blanking) timing
Display Blanking
Blank the display by loading a blank or space into each digit
of the display or by using the (BL) display blank input. Setting
the (BL) input low does not affect the contents of data mem-
ory.
A ashing circuit can easily be constructed using a 555
astable multivibrator. Figure 3 illustrates a circuit in which
varying R1 (100K~10K) will have a ash rate of 1 Hz~10 Hz.
The display can be dimmed by pulse width modulating the
(BL) at a frequency sufciently fast to not interfere with the
internal clock. The dimming signal frequency should be 2.5
KHz or higher. Dimming the display also reduces power con-
sumption.
An example of a simple dimming circuit using a 556 is illus-
trated in Figure 4. Adjusting potentiometer R3 will dim the dis-
play by changing the blanking pulse duty cycle.
Figure 4. Dimming circuit using a 556
Figure 4a. Dimming (blanking) timing
Blanking Pulse Width
≈50% Duty Factor
500 ms
2 Hz Blanking Frequency
1
0
~
C3
1000 pF
1
2
3
4
5
6
7
14
13
12
11
10
9
8
556
Dual Timer
R2
47 K
R1
200
C1
4700 pF
C4
0.01
F
R3
500 K
VCC=5.0 V
Dimming (Blanking)
Control
C2
0.01
F
To BL Pin
on Display
1
0
200
s
Blanking Pulse Width
4
s min., 196 s max.
5 KHz Blanking Frequency
~
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