- 您現在的位置：買賣IC網 > PDF目錄376409 > SN54LS114A (Motorola, Inc.) DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP PDF資料下載
參數資料
| 型號： | SN54LS114A |
| 廠商： | Motorola, Inc. |
| 英文描述： | DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP |
| 中文描述： | 雙JK負邊沿觸發器 |
| 文件頁數： | 1/4頁 |
| 文件大?。?/td> | 146K |
| 代理商： | SN54LS114A |
5-193
FAST AND LS TTL DATA
DUAL JK NEGATIVE
EDGE-TRIGGERED FLIP-FLOP
The SN54/74LS114A offers common clock and common clear inputs and
individual J, K, and set inputs. These monolithic dual flip-flops are designed
so that when the clock goes HIGH, the inputs are enabled and data will be
accepted. The logic level of the J and K inputs may be allowed to change when
the clock pulse is HIGH and the bistable will perform according to the truth
table as long as minimum set-up times are observed. Input data is transferred
to the outputs on the negative-going edge of the clock pulse.
LOGIC DIAGRAM
(Each Flip-Flop)
"
MODE SELECT — TRUTH TABLE
OPERATING MODE
INPUTS
OUTPUTS
SD
L
H
L
H
H
H
H
CD
H
L
L
H
H
H
H
J
K
Q
Q
Set
Reset (Clear)
*Undetermined
Toggle
Load “0” (Reset)
Load “1” (Set)
Hold
X
X
X
h
l
h
l
X
X
X
h
h
l
l
H
L
H
q
L
H
q
L
H
H
q
H
L
q
* Both outputs will be HIGH while both SD and CD are LOW, but the output states
are unpredictable if SD and CD go HIGH simultaneously.
H, h = HIGH Voltage Level
L, I = LOW Voltage Level
X = Don’t Care
l, h (q) = Lower case letters indicate the state of the referenced input (or output)
l, h (q) =
one set-up time prior to the HIGH to LOW clock transition.
SN54/74LS114A
DUAL JK NEGATIVE
EDGE-TRIGGERED FLIP-FLOP
LOW POWER SCHOTTKY
LOGIC SYMBOL
!
J SUFFIX
CERAMIC
CASE 632-08
N SUFFIX
PLASTIC
CASE 646-06
14
1
14
1
ORDERING INFORMATION
SN54LSXXXJ
SN74LSXXXN
SN74LSXXXD
Ceramic
Plastic
SOIC
14
1
D SUFFIX
SOIC
CASE 751A-02
相關PDF資料 |
PDF描述 |
|---|---|
| SN54LS114J | DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP |
| SN74LS114D | DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP |
| SN74LS114N | Optical Receiver for Industrial Applications with SMA Port,, Standard Power, RoHS Compliant |
| SN54LS126J | CAP CERAMIC 4.7UF 10V Y5V 0805 |
| SN54LS125 | QUAD 3-STATE BUFFERS |
相關代理商/技術參數 |
參數描述 |
|---|---|
| SN54LS11J | 制造商:Texas Instruments 功能描述:AND Gate 3-Element 3-IN Bipolar 14-Pin CDIP Tube 制造商:Texas Instruments 功能描述:AND GATE 3-ELEM 3-IN BIPOLAR 14CDIP - Rail/Tube |
| SN54LS122FK | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| SN54LS122J | 制造商:TI 功能描述:54LS122 制造商:Freescale Semiconductor 功能描述: |
| SN54LS123J | 制造商:Texas Instruments 功能描述:Monostable Multivibrator Dual 16-Pin CDIP Tube 制造商:Texas Instruments 功能描述:MONOSTABLE MULTIVIBRATOR DUAL 16CDIP - Rail/Tube 制造商:Texas Instruments 功能描述:DUAL MONOSTABLE MULTIVIBRATOR 制造商:Texas Instruments 功能描述:Dual monostable multivibrator,SN54LS123J |
| SN54LS125AJ | 制造商:Texas Instruments 功能描述:Buffer/Line Driver 4-CH Non-Inverting 3-ST Bipolar 14-Pin CDIP Tube 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Texas Instruments 功能描述:BFFR/LINE DRVR 4-CH NON-INV 3-ST BIPOLAR 14CDIP - Rail/Tube 制造商:Texas Instruments 功能描述:QUAD 3-STATE BUFFER (LOW ENABLE) |
發布緊急采購，3分鐘左右您將得到回復。